+ 2'b10: begin /* signed byte */
+ lsrh_rddata_s1 = raddr[1] ? dc__rd_data_3a[31:16] : dc__rd_data_3a[15:0];
+ lsrh_rddata_s2 = raddr[0] ? lsrh_rddata_s1[15:8] : lsrh_rddata_s1[7:0];
+ lsrh_rddata = {{24{lsrh_rddata_s2[7]}}, lsrh_rddata_s2};
+ end
+ 2'b11: begin /* signed half */
+ lsrh_rddata = raddr[1] ? {{16{dc__rd_data_3a[31]}}, dc__rd_data_3a[31:16]} : {{16{dc__rd_data_3a[15]}}, dc__rd_data_3a[15:0]};
+ end
+ default: begin
+ lsrh_rddata = 32'hxxxxxxxx;
+ end
+ endcase
+
+ case(lsrh_state)
+ `LSRH_MEMIO: begin end
+ `LSRH_BASEWB:
+ next_outbubble = 1'b0;
+ `LSRH_WBFLUSH: begin end
+ default: begin end
+ endcase
+ end
+ `DECODE_LDRSTR_UNDEFINED: begin end
+ `DECODE_LDRSTR: if(!bubble_3a) begin
+ next_outbubble = dc__rw_wait_3a;
+ /* rotate to correct position */
+ align_s1 = raddr[1] ? {dc__rd_data_3a[15:0], dc__rd_data_3a[31:16]} : dc__rd_data_3a;
+ align_s2 = raddr[0] ? {align_s1[7:0], align_s1[31:8]} : align_s1;
+ /* select byte or word */
+ align_rddata = insn_3a[22] ? {24'b0, align_s2[7:0]} : align_s2;
+ case(lsr_state)
+ `LSR_MEMIO:
+ if (insn_3a[22] /* B */ && !insn_3a[20] /* L */)
+ do_rd_data_latch = 1;
+ `LSR_STRB_WR: begin end
+ `LSR_BASEWB:
+ next_outbubble = 0;
+ `LSR_WBFLUSH: begin end
+ default: begin end
+ endcase
+ end
+ /* XXX ldm/stm incorrect in that stupid case where one of the listed regs is the base reg */
+ `DECODE_LDMSTM: if(!bubble_3a) begin
+ next_outbubble = dc__rw_wait_3a;
+ case(lsm_state)
+ `LSM_SETUP: begin end
+ `LSM_MEMIO: begin end