DCache: Be more verbose about fills.

[firearm.git] / DCache.v

diff --git a/DCache.v b/DCache.v
index a3484a7558b81e5bf3db42a4d11e3b0f2b834e5b..ab684480e3923919d6049b813b588e91fd98e433 100644 (file)
--- a/DCache.v
+++ b/DCache.v
@@ -79,7 +79,8 @@ module DCache(
                if (rd_req && (cache_fill_pos != 0) && ((prev_addr != {addr[31:6], 6'b0}) || cache_hit))        /* If this wasn't from the same line, or we've moved on somehow, reset the fill circuitry. */
                        cache_fill_pos <= 0;
                else if (rd_req && !cache_hit) begin
-                       if (bus_ready) begin    /* Started the fill, and we have data. */
+                       if (bus_ready && bus_ack) begin /* Started the fill, and we have data. */
+                               $display("DCACHE: FILL: rd addr %08x; bus addr %08x; bus data %08x, bus_req %d, bus_ack %d", addr, bus_addr, bus_rdata, bus_req, bus_ack);
                                cache_data[idx][cache_fill_pos] <= bus_rdata;
                                cache_fill_pos <= cache_fill_pos + 1;
                                if (cache_fill_pos == 15) begin /* Done? */