Fetch: Fix async reset to actually not do it wrong.

[firearm.git] / Terminal.v

diff --git a/Terminal.v b/Terminal.v
index 9dc5a213f3b6212addd4ebd66bff6894a4d4fa56..dd041d0a5dbeb0576398856379922cf652155075 100644 (file)
--- a/Terminal.v
+++ b/Terminal.v
@@ -12,6 +12,8 @@ module Terminal(
        /* Terminal pretends to be cp5. */
        reg towrite = 0;
        reg [7:0] data = 0;
+       reg [8:0] indata = 0;   /* High bit is if data is present. */
+       reg didread = 0;
        
        always @(*)
        begin
@@ -19,15 +21,25 @@ module Terminal(
                data = 8'hxx;
                cp_ack = 0;
                cp_busy = 0;
+               cp_read = 0;
+               didread = 0;
                if (cp_req && (cp_rnw == 0) && (cp_insn[27:24] == 4'b1110) && (cp_insn[19:16] == 4'b0000) && (cp_insn[11:8] == 4'h5))
                begin
                        towrite = 1;
                        data = cp_write[7:0];
                        cp_ack = 1;
+               end else if (cp_req && (cp_rnw == 1) && (cp_insn[27:24] == 4'b1110) && (cp_insn[19:16] == 4'b0001) && (cp_insn[11:8] == 4'h5))
+               begin
+                       cp_read = {23'h0, indata[8:0]};
+                       cp_ack = 1;
+                       didread = cp_insn[7:5] == 1;
                end
        end
-       
+`ifdef verilator       
        always @(posedge clk)
                if (towrite)
                        $c("{extern void term_output(unsigned char d); term_output(",data,");}");
+               else if (didread || !indata[8])
+                       indata = $c("({extern unsigned int term_input(); term_input();})");
+`endif
 endmodule