+
+module SuckLessShifter(
+ input [31:0] oper,
+ input carryin,
+ input [5:0] amt,
+ input is_arith,
+ input is_rot,
+ output [31:0] res,
+ output carryout
+);
+
+ wire [32:0] stage1, stage2, stage3, stage4, stage5;
+
+ wire pushbits = is_arith & oper[31];
+
+ /* do a barrel shift */
+ assign stage1 = amt[5] ? {is_rot ? oper : {32{pushbits}}, oper[31]} : {oper, carryin};
+ assign stage2 = amt[4] ? {is_rot ? stage1[15:0] : {16{pushbits}}, stage1[31:16], stage1[15]} : stage1;
+ assign stage3 = amt[3] ? {is_rot ? stage2[7:0] : {8{pushbits}}, stage2[31:8], stage2[7]} : stage2;
+ assign stage4 = amt[2] ? {is_rot ? stage3[3:0] : {4{pushbits}}, stage3[31:4], stage3[3]} : stage3;
+ assign stage5 = amt[1] ? {is_rot ? stage4[1:0] : {2{pushbits}}, stage4[31:2], stage4[1]} : stage4;
+ assign {res, carryout} = amt[0] ? {is_rot ? stage5[0] : pushbits, stage5[31:1], stage5[0]} : stage5;
+
+endmodule
+
+module SuckLessRotator(
+ input [31:0] oper,
+ input [3:0] amt,
+ output [31:0] res
+);
+
+ wire [31:0] stage1, stage2, stage3;
+ assign stage1 = amt[3] ? {oper[15:0], oper[31:16]} : oper;
+ assign stage2 = amt[2] ? {stage1[7:0], stage1[31:8]} : stage1;
+ assign stage3 = amt[1] ? {stage2[3:0], stage2[31:4]} : stage2;
+ assign res = amt[0] ? {stage3[1:0], stage3[31:2]} : stage3;
+
+endmodule