system: Correct routing regressions from renames.
[firearm.git] / Makefile
CommitLineData
6d8250a2
JW
1VLOGS = ARM_Constants.v BigBlockRAM.v BlockRAM.v BusArbiter.v DCache.v Decode.v Execute.v Fetch.v ICache.v Issue.v Memory.v Minishift.v RegFile.v Terminal.v Writeback.v system.v
2
3all: Vsystem
4
5Vsystem: obj_dir/Vsystem.mk testbench.cpp
6 make -C obj_dir -f Vsystem.mk
58f12604 7 ln -sf obj_dir/Vsystem Vsystem
6d8250a2
JW
8
9obj_dir/Vsystem.mk: $(VLOGS)
10 mkdir -p obj_dir
11 verilator --cc system.v testbench.cpp --exe
12
056fa141
JW
13auto: .DUMMY
14 emacs -l ~/elisp/verilog-mode.el --batch system.v -f verilog-batch-auto
15
58f12604
JW
16tests: .DUMMY
17 make -C tests
18
19.DUMMY:
This page took 0.016789 seconds and 4 git commands to generate.