git.joshuawise.com / firearm.git / blame
| Commit | Line | Data |
|---|---|---|
| 8744c23d JW |
1 | TARGET = FireARM |
| 2 | VLOGS = Console.v ARM_Constants.v BigBlockRAM.v BlockRAM.v BusArbiter.v DCache.v Decode.v Execute.v Fetch.v ICache.v Issue.v Memory.v RegFile.v system.v Terminal.v Writeback.v | |
| 3 | VLOGS_ALL = $(VLOGS) ram.hex | |
| 4 | ||
| 5 | all: fpga_target | |
| 6 | ||
| 7 | BITGEN_OPTS = \ | |
| 8 | -w \ | |
| 9 | -g DebugBitstream:No \ | |
| 10 | -g Binary:no \ | |
| 11 | -g CRC:Enable \ | |
| 12 | -g ProgPin:PullUp \ | |
| 13 | -g DonePin:PullUp \ | |
| 14 | -g TckPin:PullUp \ | |
| 15 | -g TdiPin:PullUp \ | |
| 16 | -g TdoPin:PullUp \ | |
| 17 | -g TmsPin:PullUp \ | |
| 18 | -g UnusedPin:PullDown \ | |
| 19 | -g UserID:0xFFFFFFFF \ | |
| 20 | -g StartUpClk:CClk \ | |
| 21 | -g DONE_cycle:4 \ | |
| 22 | -g GTS_cycle:5 \ | |
| 23 | -g GWE_cycle:6 \ | |
| 24 | -g Security:None \ | |
| 25 | -g DonePipe:No \ | |
| 26 | -g Match_cycle:2 \ | |
| 27 | -g DriveDone:No | |
| 28 | ||
| 29 | fpga_target: $(TARGET).bit | |
| 30 | ||
| 31 | $(TARGET).ngc: $(TARGET).xst $(VLOGS_ALL) | |
| 32 | @mkdir -p xst/projnav.tmp | |
| 33 | @echo work > $(TARGET).lso | |
| 34 | @rm -f $(TARGET).prj | |
| 35 | @for i in $(VLOGS); do echo verilog work '"'$$i'"' >> $(TARGET).prj; done | |
| 36 | xst -ifn $(TARGET).xst -ofn $(TARGET).syr | |
| 37 | ||
| 38 | # for post-synth simulation | |
| 39 | $(TARGET)-bare.ngc: $(TARGET)-bare.xst $(VLOGS_ALL) | |
| 40 | @mkdir -p xst/projnav.tmp | |
| 41 | @echo work > $(TARGET).lso | |
| 42 | @rm -f $(TARGET).prj | |
| 43 | @for i in $(VLOGS); do echo verilog work '"'$$i'"' >> $(TARGET).prj; done | |
| 44 | xst -ifn $(TARGET)-bare.xst -ofn $(TARGET)-bare.syr | |
| 45 | ||
| 46 | ||
| 47 | # for synth mismatch diagnostics | |
| 48 | $(TARGET)-memory.ngc: $(TARGET)-memory.xst $(VLOGS_ALL) | |
| 49 | @mkdir -p xst/projnav.tmp | |
| 50 | @echo work > $(TARGET).lso | |
| 51 | @rm -f $(TARGET).prj | |
| 52 | @for i in $(VLOGS); do echo verilog work '"'$$i'"' >> $(TARGET).prj; done | |
| 53 | xst -ifn $(TARGET)-memory.xst -ofn $(TARGET)-memory.syr | |
| 54 | ||
| 55 | sim/%.v: %.ngc | |
| 56 | netgen -ofmt verilog -w -dir sim $< | |
| 57 | ||
| 58 | $(TARGET).ngd: $(TARGET).ngc $(TARGET).ucf | |
| 59 | ngdbuild -dd _ngo -uc $(TARGET).ucf -nt timestamp -p xc5vlx110t-ff1136-1 "$(TARGET).ngc" $(TARGET).ngd | |
| 60 | ||
| 61 | $(TARGET)_map.ncd: $(TARGET).ngd | |
| 62 | map -w -p xc5vlx110t-ff1136-1 -cm area -pr off -k 4 -c 100 -o $(TARGET)_map.ncd $(TARGET).ngd $(TARGET).pcf | |
| 63 | ||
| 64 | $(TARGET).ncd: $(TARGET)_map.ncd | |
| 65 | par -w -ol std -t 1 $(TARGET)_map.ncd $(TARGET).ncd $(TARGET).pcf | |
| 66 | ||
| 67 | $(TARGET).twr: $(TARGET)_map.ncd | |
| 68 | trce -e 3 -s 5 -xml $(TARGET) $(TARGET).ncd -o $(TARGET).twr $(TARGET).pcf -ucf $(TARGET).ucf | |
| 69 | ||
| 70 | $(TARGET).bit: $(TARGET).ncd | |
| 71 | bitgen $(BITGEN_OPTS) $(TARGET).ncd | |
| 72 | ||
| 73 | $(TARGET).svf: $(TARGET).bit impact.cmd | |
| 74 | sed -e s/XXX/$(subst .bit,,$<)/ < impact.cmd > tmp.cmd | |
| 75 | impact -batch tmp.cmd | |
| 76 | ||
| 77 | clean: | |
| 78 | rm -f $(TARGET).bgn $(TARGET).ngc $(TARGET).svf $(TARGET).ngd $(TARGET).bit $(TARGET).twr $(TARGET).ncd $(TARGET)_map.ncd $(TARGET)_map.* | |
| 79 | rm -f $(TARGET).bld $(TARGET).drc $(TARGET)_ngdbuild.xrpt $(TARGET)_pad.* $(TARGET).pad $(TARGET).par $(TARGET)_par.xrpt $(TARGET).ngr | |
| 80 | rm -f $(TARGET).pcf $(TARGET)_summary.xml $(TARGET).unroutes $(TARGET)_usage.xml $(TARGET)_xst.xrpt $(TARGET).syr $(TARGET).ptwx $(TARGET).xpi | |
| 81 | rm -rf xst | |
| 82 | rm -rf xlnx_auto_* | |
| 83 | rm -rf _ngo | |
| 84 | rm -f tmp.cmd | |
| 85 | rm -f _impactbatch.log | |
| 86 | rm -f $(TARGET).prj | |
| 87 | rm -f $(TARGET).lso | |
| 88 |