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Issue: Fix case in which lr is read in the instruction immediately after a bl; now...
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Fri, 23 Jan 2009 09:58:39 +0000 (04:58 -0500)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Fri, 23 Jan 2009 09:58:39 +0000 (04:58 -0500)
commita02d953fd172f2a0ba14a30116d6cdc4885ef4e1
treee3ebad01e1a194cda423504ab0d951b5234768c4tree | snapshot
parent1a14e54aaa07fb39cf3b79790d0de2e68f54949ccommit | diff
Issue: Fix case in which lr is read in the instruction immediately after a bl; now flushes no longer clear inflight registers (which makes this a superset of the correct behavior), and now def_regs, well, defines regs.  This fixed the miniblarg -O1 bug.
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FireARM pipelined ARM-like CPU implementation in Verilog
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