FeckfulnessAnalysis.optimizer,
ConstantFold.optimizer,
LabelCoalescing.optimizer,
- Peephole.optimizer*)]
+ Peephole.optimizer*)] : Optimizer.optimization list
val uniqopts =
foldr
val _ = Flag.guard Flags.verbose say " Generating proto-x86_64 code..."
val assem = Codegen.codegen ir
val _ = Flag.guard Flags.assem
- (fn () => List.app (TextIO.print o (x86.print)) assem) ()
+ (fn () => List.app (TextIO.print o (Blarg.print)) assem) ()
val _ = Flag.guard Flags.verbose say " Optimizing pre-liveness..."
val assem = Optimizer.optimize_preliveness (!enabledopts) assem
(fn (asm, liv) =>
TextIO.print (
let
- val xpp = x86.print asm
+ val xpp = Blarg.print asm
val xpp = String.extract (xpp, 0, SOME (size xpp - 1))
val spaces = implode (List.tabulate (40 - size xpp, fn _ => #" ")) handle size => ""
val lpp = Liveness.prettyprint liv
(fn () => List.app (TextIO.print o
(fn (t, i) =>
(Temp.name t) ^ " => " ^ (
- if (i <= x86.regtonum x86.R13D)
- then (x86.pp_oper (x86.REG (x86.numtoreg i), Temp.Long))
+ if (i <= 15)
+ then (Blarg.pp_oper (Blarg.REG (Blarg.numtoreg i)))
else
- "spill[" ^ Int.toString (i - x86.regtonum x86.R13D) ^ "]")
+ "spill[" ^ Int.toString (i - Blarg.regtonum Blarg.PC) ^ "]")
^ "--"^ Int.toString i ^ "\n"))
colors) ()
- val _ = Flag.guard Flags.verbose say " Solidifying x86_64 code..."
+ val _ = Flag.guard Flags.verbose say " Solidifying blargCPU code..."
val x86 = Solidify.solidify colors assem
val _ = Flag.guard Flags.verbose say " Optimizing final assembly..."
val x86p = Optimizer.optimize_final (!enabledopts) x86
val _ = Flag.guard Flags.verbose say " Stringifying..."
- val x86d = [x86.DIRECTIVE(".globl " ^ name),
- x86.DIRECTIVE(name ^ ":")]
+ val x86d = [Blarg.DIRECTIVE(".globl " ^ name),
+ Blarg.DIRECTIVE(name ^ ":")]
@ x86p
val code = Stringify.stringify realname x86d
in