input [1:0] buttons,
output tos_output,
output reg data_output,
- output reg [3:0] anode,
- output reg [7:0] cathode);
+ output reg [3:0] anode = 4'hF,
+ output reg [7:0] cathode = 8'hFF);
reg [3:0] tos_inputs_e;
reg [3:0] tos_inputs;
reg [1:0] tos_select;
+wire [4:0] edge_counter;
wire [3:0] current_bit;
assign tos_output = tos_inputs_e2[tos_select];
seg = data[9:8];
tos_select = data[11:10];
end
-
- wire [5:0] output_stuff = { buttons, tos_good };
+
+ // Buttons are active-low, so invert them.
+ wire [7:0] output_stuff = { 2'b0, ~buttons, tos_good };
always @(*)
data_output = output_stuff[current_bit[2:0]];
TOS_Detect detect[3:0](.xtal(xtal), .tos_input(tos_inputs), .tos_good(tos_good));
- POS_Serial serinput(.xtal(xtal), .serial(serial), .data_reg(data), .current_bit(current_bit), .data_good(data_good));
+ POS_Serial serinput(.xtal(xtal), .serial(serial), .data_reg(data), .current_bit(current_bit), .data_good(data_good), .edge_counter(edge_counter));
endmodule
input serial,
output reg [11:0] data_reg = 0,
output reg [3:0] current_bit = 0,
+ output reg [4:0] edge_counter = 0,
output reg data_good = 0);
reg serial_1a;
always @(posedge xtal)
- serial_1a = serial;
+ serial_1a <= serial;
wire edge_detect = serial ^ serial_1a;
- reg [4:0] edge_counter = 0;
always @(posedge xtal) begin
- data_good = 0;
+ data_good <= 0;
if (edge_detect) begin
if (edge_counter == 31) begin
- current_bit = 0;
- data_reg = 0;
+ current_bit <= 0;
+// data_reg <= 0;
end else begin
// data_reg[11:1] = data_reg[10:0];
// data_reg[0] = (edge_counter > 20);
- data_reg[current_bit] = (edge_counter > 20);
+ data_reg[current_bit] <= ((edge_counter > 20) ? 1'b1 : 1'b0);
if (current_bit == 11) begin
- data_good = 1;
- current_bit = 0;
+ current_bit <= 0;
end else
- current_bit = current_bit + 1;
+ current_bit <= current_bit + 1;
end
- edge_counter = 0;
+ edge_counter <= 0;
end else begin
if (edge_counter != 31)
- edge_counter = edge_counter + 1;
+ edge_counter <= edge_counter + 1;
end
end
endmodule
tos_input_1a <= tos_input;
wire transition = tos_input ^ tos_input_1a;
- reg [3:0] lasttx = 0;
+ reg [4:0] lasttx = 0;
always @(posedge xtal) begin
if (transition) begin
if (lasttx < 2) /* Too soon! */