X-Git-Url: http://git.joshuawise.com/netwatch.git/blobdiff_plain/efea5b4edd5cc94b4ed0917ebca0efb6bb6a2f82..8e7d9af004f36ed0d2dc94d1e8254e2ff5a32503:/ich2/smi.c

diff --git a/ich2/smi.c b/ich2/smi.c
index adba74f..c9a1f0e 100644
--- a/ich2/smi.c
+++ b/ich2/smi.c
@@ -1,3 +1,14 @@
+/* smi.c
+ * System management interrupt dispatch routines for ICH2 southbridge
+ * NetWatch system management mode administration console
+ *
+ * Copyright (c) 2008 Jacob Potter and Joshua Wise.  All rights reserved.
+ * This program is free software; you can redistribute and/or modify it under
+ * the terms found in the file LICENSE in the root of this source tree. 
+ *
+ */
+
+
 #include <smi.h>
 #include <pci.h>
 #include <io.h>
@@ -6,6 +17,8 @@
 #include <reg-82801b.h>
 #include <output.h>
 
+static smi_handler_t _handlers[SMI_EVENT_MAX] = {0};
+
 static uint16_t _get_PMBASE()
 {
 	static long pmbase = -1;
@@ -40,7 +53,10 @@ void smi_poll()
 	
 	if (sts & ICH2_SMI_STS_BIOS_STS)
 	{
-		output("Unhandled: BIOS_STS");
+		if (_handlers[SMI_EVENT_GBL_RLS] == SMI_HANDLER_NONE)
+			output("Unhandled: BIOS_STS");
+		else if (_handlers[SMI_EVENT_GBL_RLS] != SMI_HANDLER_IGNORE)
+			_handlers[SMI_EVENT_GBL_RLS](SMI_EVENT_GBL_RLS);
 		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_BIOS_STS);
 	}
 	
@@ -64,11 +80,11 @@ void smi_poll()
 	
 	if (sts & ICH2_SMI_STS_SWSMI_TMR_STS)	// Ack it, then request another.
 	{
+		if (_handlers[SMI_EVENT_FAST_TIMER] == SMI_HANDLER_NONE)
+			output("Unhandled: SWSMI_TMR_STS");
+		else if (_handlers[SMI_EVENT_FAST_TIMER] != SMI_HANDLER_IGNORE)
+			_handlers[SMI_EVENT_FAST_TIMER](SMI_EVENT_FAST_TIMER);
 		outl(_get_PMBASE() + ICH2_PMBASE_SMI_STS, ICH2_SMI_STS_SWSMI_TMR_STS);
-		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
-			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) & ~ICH2_SMI_EN_SWSMI_TMR_EN);
-		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
-			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) | ICH2_SMI_EN_SWSMI_TMR_EN);
 	}
 	
 	if (sts & ICH2_SMI_STS_PM1_STS_REG)
@@ -127,6 +143,21 @@ void smi_poll()
 		unsigned short mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
 		unsigned long devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
 		unsigned long devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
+		
+		if (devact_sts & ICH2_DEVACT_STS_KBC_ACT_STS)
+		{
+			if (_handlers[SMI_EVENT_DEVTRAP_KBC] == SMI_HANDLER_NONE)
+				output("Unhandled: DEVACT_KBC_ACT_STS");
+			else if (_handlers[SMI_EVENT_DEVTRAP_KBC] != SMI_HANDLER_IGNORE)
+				_handlers[SMI_EVENT_DEVTRAP_KBC](SMI_EVENT_DEVTRAP_KBC);
+			outl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS, ICH2_DEVACT_STS_KBC_ACT_STS);
+		}
+		
+		/* Refresh register cache so that we can print unhandleds as needed. */
+		mon_smi = inw(_get_PMBASE() + ICH2_PMBASE_MON_SMI);
+		devact_sts = inl(_get_PMBASE() + ICH2_PMBASE_DEVACT_STS);
+		devtrap_en = inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN);
+		
 		if (((mon_smi & 0x0F00) >> 8) & ((mon_smi & 0xF000) >> 12))
 			outputf("Unhandled: MON_SMI (%04x)", mon_smi);
 		if (devact_sts & devtrap_en)
@@ -165,3 +196,59 @@ void smi_poll()
 			ICH2_SMI_EN_EOS |
 			ICH2_SMI_EN_GBL_SMI_EN);
 }
+
+int smi_register_handler(smi_event_t ev, smi_handler_t hnd)
+{
+	if (ev >= SMI_EVENT_MAX)
+		return -1;
+	_handlers[ev] = hnd;
+	return 0;
+}
+
+int smi_enable_event(smi_event_t ev)
+{
+	switch(ev)
+	{
+	case SMI_EVENT_FAST_TIMER:
+		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
+				ICH2_SMI_EN_SWSMI_TMR_EN);
+		return 0;
+	case SMI_EVENT_DEVTRAP_KBC:
+		outl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN,
+			inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) |
+				ICH2_DEVTRAP_EN_KBC_TRP_EN);
+		return 0;
+	case SMI_EVENT_GBL_RLS:
+		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) |
+				ICH2_SMI_EN_BIOS_EN);
+		return 0;
+	default:
+		return -1;
+	}
+}
+
+int smi_disable_event(smi_event_t ev)
+{
+	switch(ev)
+	{
+	case SMI_EVENT_FAST_TIMER:
+		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
+				~ICH2_SMI_EN_SWSMI_TMR_EN);
+		return 0;
+	case SMI_EVENT_DEVTRAP_KBC:
+		outl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN,
+			inl(_get_PMBASE() + ICH2_PMBASE_DEVTRAP_EN) &
+				~ICH2_DEVTRAP_EN_KBC_TRP_EN);
+		return 0;
+	case SMI_EVENT_GBL_RLS:
+		outl(_get_PMBASE() + ICH2_PMBASE_SMI_EN,
+			inl(_get_PMBASE() + ICH2_PMBASE_SMI_EN) &
+				~ICH2_SMI_EN_BIOS_EN);
+		return 0;
+	default:
+		return -1;
+	}
+}