X-Git-Url: http://git.joshuawise.com/netwatch.git/blobdiff_plain/d6f56afa7470cf4c29f4f9fa4bf2dd1bd0ba9193..bec09bd18a879a22688c68febaff8c65da41f752:/net/3c90x.c diff --git a/net/3c90x.c b/net/3c90x.c index 37fd34d..5686327 100644 --- a/net/3c90x.c +++ b/net/3c90x.c @@ -38,18 +38,21 @@ */ #include "etherboot-compat.h" +#include "net.h" #include #include #include +#include #include #include +#include #define XCVR_MAGIC (0x5A00) /** any single transmission fails after 16 collisions or other errors ** this is the number of times to retry the transmission -- this should ** be plenty **/ -#define XMIT_RETRIES 250 +#define XMIT_RETRIES 5 /*** Register definitions for the 3c905 ***/ enum Registers @@ -215,28 +218,24 @@ enum Commands #define INT_CMDINPROGRESS (1<<12) #define INT_WINDOWNUMBER (7<<13) +/* These structures are all 64-bit aligned, as needed for bus-mastering I/O. */ +typedef struct { + unsigned int addr; + unsigned int len; +} segment_t __attribute__ ((aligned(8))); -/*** TX descriptor ***/ -typedef struct - { - unsigned int DnNextPtr; - unsigned int FrameStartHeader; - unsigned int HdrAddr; - unsigned int HdrLength; - unsigned int DataAddr; - unsigned int DataLength; - } - TXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */ +typedef struct { + unsigned int next; + unsigned int hdr; + segment_t segments[64 /* XXX magic */]; +} txdesc_t __attribute__ ((aligned(8))); /*** RX descriptor ***/ -typedef struct - { - unsigned int UpNextPtr; - unsigned int UpPktStatus; - unsigned int DataAddr; - unsigned int DataLength; - } - RXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */ +typedef struct { + unsigned int next; + unsigned int status; + segment_t segments[64]; +} rxdesc_t __attribute__ ((aligned(8))); /*** Global variables ***/ static struct @@ -246,79 +245,77 @@ static struct unsigned char CurrentWindow; unsigned int IOAddr; unsigned char HWAddr[ETH_ALEN]; - TXD TransmitDPD; - RXD ReceiveUPD; } INF_3C90X; +static struct nic nic; +static txdesc_t txdesc; -/*** a3c90x_internal_IssueCommand: sends a command to the 3c90x card - ***/ -static int -a3c90x_internal_IssueCommand(int ioaddr, int cmd, int param) - { - unsigned int val; +#define _outl(v,a) outl((a),(v)) +#define _outw(v,a) outw((a),(v)) +#define _outb(v,a) outb((a),(v)) - /** Build the cmd. **/ - val = cmd; - val <<= 11; - val |= param; - - /** Send the cmd to the cmd register **/ - outw(val, ioaddr + regCommandIntStatus_w); +static int _issue_command(int ioaddr, int cmd, int param) +{ + outw(ioaddr + regCommandIntStatus_w, (cmd << 11) | param); - /** Wait for the cmd to complete, if necessary **/ - while (inw(ioaddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); + while (inw(ioaddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) + ; - return 0; - } + return 0; +} /*** a3c90x_internal_SetWindow: selects a register window set. ***/ -static int -a3c90x_internal_SetWindow(int ioaddr, int window) - { - - /** Window already as set? **/ - if (INF_3C90X.CurrentWindow == window) return 0; +static int _set_window(int ioaddr, int window) +{ + if (INF_3C90X.CurrentWindow == window) + return 0; - /** Issue the window command. **/ - a3c90x_internal_IssueCommand(ioaddr, cmdSelectRegisterWindow, window); + _issue_command(ioaddr, cmdSelectRegisterWindow, window); INF_3C90X.CurrentWindow = window; - return 0; - } + return 0; +} /*** a3c90x_internal_ReadEeprom - read data from the serial eeprom. ***/ static unsigned short a3c90x_internal_ReadEeprom(int ioaddr, int address) - { - unsigned short val; +{ + unsigned short val; /** Select correct window **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winEepromBios0); + _set_window(INF_3C90X.IOAddr, winEepromBios0); /** Make sure the eeprom isn't busy **/ - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); + do + { + int i; + for (i = 0; i < 165; i++) + inb(0x80); /* wait 165 usec */ + } + while(0x8000 & inw(ioaddr + regEepromCommand_0_w)); /** Read the value. **/ if (INF_3C90X.is3c556) - { - outw(address + (0x230), ioaddr + regEepromCommand_0_w); - } + _outw(address + (0x230), ioaddr + regEepromCommand_0_w); else - { - outw(address + ((0x02)<<6), ioaddr + regEepromCommand_0_w); - } - - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); - val = inw(ioaddr + regEepromData_0_w); + _outw(address + 0x80, ioaddr + regEepromCommand_0_w); - return val; - } + do + { + int i; + for (i = 0; i < 165; i++) + inb(0x80); /* wait 165 usec */ + } + while(0x8000 & inw(ioaddr + regEepromCommand_0_w)); + val = inw(ioaddr + regEepromData_0_w); + + return val; +} #ifdef CFG_3C90X_BOOTROM_FIX @@ -331,26 +328,26 @@ static int a3c90x_internal_WriteEepromWord(int ioaddr, int address, unsigned short value) { /** Select register window **/ - a3c90x_internal_SetWindow(ioaddr, winEepromBios0); + _set_window(ioaddr, winEepromBios0); /** Verify Eeprom not busy **/ while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); /** Issue WriteEnable, and wait for completion. **/ - outw(0x30, ioaddr + regEepromCommand_0_w); + _outw(0x30, ioaddr + regEepromCommand_0_w); while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); /** Issue EraseRegister, and wait for completion. **/ - outw(address + ((0x03)<<6), ioaddr + regEepromCommand_0_w); + _outw(address + ((0x03)<<6), ioaddr + regEepromCommand_0_w); while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); /** Send the new data to the eeprom, and wait for completion. **/ - outw(value, ioaddr + regEepromData_0_w); - outw(0x30, ioaddr + regEepromCommand_0_w); + _outw(value, ioaddr + regEepromData_0_w); + _outw(0x30, ioaddr + regEepromCommand_0_w); while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); /** Burn the new data into the eeprom, and wait for completion. **/ - outw(address + ((0x01)<<6), ioaddr + regEepromCommand_0_w); + _outw(address + ((0x01)<<6), ioaddr + regEepromCommand_0_w); while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); return 0; @@ -406,68 +403,41 @@ a3c90x_internal_WriteEeprom(int ioaddr, int address, unsigned short value) ***/ static void a3c90x_reset(void) { -#ifdef CFG_3C90X_PRESERVE_XCVR - int cfg; - /** Read the current InternalConfig value. **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); - cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l); -#endif - /** Send the reset command to the card **/ - outputf("Issuing RESET:"); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdGlobalReset, 0); - - /** wait for reset command to complete **/ - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); + outputf("3c90x: issuing RESET"); + _issue_command(INF_3C90X.IOAddr, cmdGlobalReset, 0); /** global reset command resets station mask, non-B revision cards ** require explicit reset of values **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winAddressing2); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4); - -#ifdef CFG_3C90X_PRESERVE_XCVR - /** Re-set the original InternalConfig value from before reset **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); - outl(cfg, INF_3C90X.IOAddr + regInternalConfig_3_l); - - /** enable DC converter for 10-Base-T **/ - if ((cfg&0x0300) == 0x0300) - { - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdEnableDcConverter, 0); - } -#endif + _set_window(INF_3C90X.IOAddr, winAddressing2); + _outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0); + _outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2); + _outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4); /** Issue transmit reset, wait for command completion **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxReset, 0); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) - ; + _issue_command(INF_3C90X.IOAddr, cmdTxReset, 0); if (! INF_3C90X.isBrev) - outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); + _outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b); + _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0); /** ** reset of the receiver on B-revision cards re-negotiates the link ** takes several seconds (a computer eternity) **/ if (INF_3C90X.isBrev) - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x04); + _issue_command(INF_3C90X.IOAddr, cmdRxReset, 0x04); else - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x00); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); - ; - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxEnable, 0); + _issue_command(INF_3C90X.IOAddr, cmdRxReset, 0x00); + while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) + ; + _issue_command(INF_3C90X.IOAddr, cmdRxEnable, 0); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdSetInterruptEnable, 0); + _issue_command(INF_3C90X.IOAddr, cmdSetInterruptEnable, 0); /** enable rxComplete and txComplete **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdSetIndicationEnable, 0x0014); + _issue_command(INF_3C90X.IOAddr, cmdSetIndicationEnable, 0x0014); /** acknowledge any pending status flags **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdAcknowledgeInterrupt, 0x661); + _issue_command(INF_3C90X.IOAddr, cmdAcknowledgeInterrupt, 0x661); return; } @@ -481,191 +451,210 @@ static void a3c90x_reset(void) *** size - size of the non-header part of the packet that needs transmitted; *** pkt - the pointer to the packet data itself. ***/ -static void -a3c90x_transmit(const char *dest_addr, unsigned int proto, - unsigned int size, const char *pkt) - { - - struct eth_hdr - { - unsigned char dst_addr[ETH_ALEN]; - unsigned char src_addr[ETH_ALEN]; - unsigned short type; - } hdr; - - unsigned char status; - unsigned i, retries; - - for (retries=0; retries < XMIT_RETRIES ; retries++) +static void _transmit(struct pbuf *p) +{ + unsigned char status; + static struct pbuf *oldpbuf = NULL; + unsigned int n, len; + + if (oldpbuf) { - /** Stall the download engine **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdStallCtl, 2); - - /** Make sure the card is not waiting on us **/ - inw(INF_3C90X.IOAddr + regCommandIntStatus_w); - inw(INF_3C90X.IOAddr + regCommandIntStatus_w); - - while (inw(INF_3C90X.IOAddr+regCommandIntStatus_w) & - INT_CMDINPROGRESS) - ; - - /** Set the ethernet packet type **/ - hdr.type = htons(proto); - - /** Copy the destination address **/ - memcpy(hdr.dst_addr, dest_addr, ETH_ALEN); + int i = 0; + while (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_TXCOMPLETE) && oneshot_running()) + i++; + if (i) + outputf("3c90x: had to wait %d loops to tx", i); + if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_TXCOMPLETE)) + { + outputf("3c90x: tx timeout? txstat %02x", inb(INF_3C90X.IOAddr + regTxStatus_b)); + outputf("3c90x: Gen sts %04x", inw(INF_3C90X.IOAddr + regCommandIntStatus_w)); + } + status = inb(INF_3C90X.IOAddr + regTxStatus_b); + outb(INF_3C90X.IOAddr + regTxStatus_b, 0x00); + pbuf_free(oldpbuf); + oldpbuf = NULL; + } - /** Copy our MAC address **/ - memcpy(hdr.src_addr, INF_3C90X.HWAddr, ETH_ALEN); + _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 2 /* Stall download */); /** Setup the DPD (download descriptor) **/ - INF_3C90X.TransmitDPD.DnNextPtr = 0; + txdesc.next = 0; + len = 0; + n = 0; + oldpbuf = p; + for (; p; p = p->next) + { + txdesc.segments[n].addr = v2p(p->payload); + txdesc.segments[n].len = p->len | (p->next ? 0 : (1 << 31)); + len += p->len; + pbuf_ref(p); + n++; + } /** set notification for transmission completion (bit 15) **/ - INF_3C90X.TransmitDPD.FrameStartHeader = (size + sizeof(hdr)) | 0x8000; - INF_3C90X.TransmitDPD.HdrAddr = virt_to_bus(&hdr); - INF_3C90X.TransmitDPD.HdrLength = sizeof(hdr); - INF_3C90X.TransmitDPD.DataAddr = virt_to_bus(pkt); - INF_3C90X.TransmitDPD.DataLength = size + (1<<31); - + txdesc.hdr = (len) | 0x8000; + /** Send the packet **/ - outl(virt_to_bus(&(INF_3C90X.TransmitDPD)), - INF_3C90X.IOAddr + regDnListPtr_l); - - /** End Stall and Wait for upload to complete. **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdStallCtl, 3); - while(inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) - ; - - /** Wait for NIC Transmit to Complete **/ - oneshot_start_ms(10); /* Give it 10 ms */ - while (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0004) && - oneshot_running()) + outl(INF_3C90X.IOAddr + regDnListPtr_l, v2p(&txdesc)); + _issue_command(INF_3C90X.IOAddr, cmdStallCtl, 3 /* Unstall download */); + + oneshot_start_ms(10); + while((inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) && oneshot_running()) ; + if (!oneshot_running()) + { + outputf("3c90x: Download engine pointer timeout"); + return; + } - if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0004)) - { - outputf("3C90X: Tx Timeout"); - continue; - } - - status = inb(INF_3C90X.IOAddr + regTxStatus_b); - - /** acknowledge transmit interrupt by writing status **/ - outb(0x00, INF_3C90X.IOAddr + regTxStatus_b); - +#if 0 /** successful completion (sans "interrupt Requested" bit) **/ if ((status & 0xbf) == 0x80) - return; + return; - outputf("3C90X: Status (%hhX)", status); + outputf("3c90x: Status (%hhX)", status); /** check error codes **/ if (status & 0x02) - { - outputf("3C90X: Tx Reclaim Error (%hhX)", status); - a3c90x_reset(); - } - else if (status & 0x04) - { - outputf("3C90X: Tx Status Overflow (%hhX)", status); - for (i=0; i<32; i++) - outb(0x00, INF_3C90X.IOAddr + regTxStatus_b); - /** must re-enable after max collisions before re-issuing tx **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); - } - else if (status & 0x08) - { - outputf("3C90X: Tx Max Collisions (%hhX)", status); - /** must re-enable after max collisions before re-issuing tx **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); - } - else if (status & 0x10) - { - outputf("3C90X: Tx Underrun (%hhX)", status); - a3c90x_reset(); - } - else if (status & 0x20) - { - outputf("3C90X: Tx Jabber (%hhX)", status); - a3c90x_reset(); - } - else if ((status & 0x80) != 0x80) - { - outputf("3C90X: Internal Error - Incomplete Transmission (%hhX)", - status); - a3c90x_reset(); - } + { + outputf("3c90x: Tx Reclaim Error (%hhX)", status); + a3c90x_reset(); + } else if (status & 0x04) { + outputf("3c90x: Tx Status Overflow (%hhX)", status); + for (i=0; i<32; i++) + _outb(0x00, INF_3C90X.IOAddr + regTxStatus_b); + /** must re-enable after max collisions before re-issuing tx **/ + _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0); + } else if (status & 0x08) { + outputf("3c90x: Tx Max Collisions (%hhX)", status); + /** must re-enable after max collisions before re-issuing tx **/ + _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0); + } else if (status & 0x10) { + outputf("3c90x: Tx Underrun (%hhX)", status); + a3c90x_reset(); + } else if (status & 0x20) { + outputf("3c90x: Tx Jabber (%hhX)", status); + a3c90x_reset(); + } else if ((status & 0x80) != 0x80) { + outputf("3c90x: Internal Error - Incomplete Transmission (%hhX)", status); + a3c90x_reset(); } +#endif +} - /** failed after RETRY attempts **/ - outputf("Failed to send after %d retries", retries); - return; +/***************************** Receive routines *****************************/ +#define MAX_RECV_SIZE 1536 +#define RECV_BUFS 4 - } +static rxdesc_t rxdescs[RECV_BUFS]; +static struct pbuf *pbufs[RECV_BUFS] = {0,}; +/* rxcons is the pointer to the receive descriptor that the ethernet card will + * write into next. + */ +static int rxcons = 0; +/* rxprod is the pointer to the receive descriptor that the driver will + * allocate next. + */ +static int rxprod = 0; -/*** a3c90x_poll: exported routine that waits for a certain length of time - *** for a packet, and if it sees none, returns 0. This routine should - *** copy the packet to nic->packet if it gets a packet and set the size - *** in nic->packetlen. Return 1 if a packet was found. - ***/ -static int -a3c90x_poll(struct nic *nic, int retrieve) - { - int i, errcode; +/* _recv_prepare fills the 3c90x's ring buffer with fresh pbufs from lwIP. + * The upload engine need not be stalled. + */ +static void _recv_prepare(struct nic *nic) +{ + int oldprod; - if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0010)) + oldprod = rxprod; + while ((rxprod != rxcons) || !pbufs[rxprod]) { - return 0; + int i; + struct pbuf *p; + + if (!pbufs[rxprod]) + pbufs[rxprod] = p = pbuf_alloc(PBUF_RAW, MAX_RECV_SIZE, PBUF_POOL); + else { + outputf("WARNING: 3c90x has pbuf in slot %d", rxprod); + p = pbufs[rxprod]; + } + + if (!p) + { + outputf("3c90x: out of memory for rx pbuf?"); + break; + } + + rxdescs[rxprod].status = 0; + rxdescs[rxprod].next = 0; + for (i = 0; p; p = p->next, i++) + { + rxdescs[rxprod].segments[i].addr = v2p(p->payload); + rxdescs[rxprod].segments[i].len = p->len | (p->next ? 0 : (1 << 31)); + } + + /* Hook in the new one after and only after it's been fully set up. */ + rxdescs[(rxprod + RECV_BUFS - 1) % RECV_BUFS].next = v2p(&(rxdescs[rxprod])); + rxprod = (rxprod + 1) % RECV_BUFS; } - - if ( ! retrieve ) return 1; - - /** we don't need to acknowledge rxComplete -- the upload engine - ** does it for us. - **/ - - /** Build the up-load descriptor **/ - INF_3C90X.ReceiveUPD.UpNextPtr = 0; - INF_3C90X.ReceiveUPD.UpPktStatus = 0; - INF_3C90X.ReceiveUPD.DataAddr = virt_to_bus(nic->packet); - INF_3C90X.ReceiveUPD.DataLength = 1536 + (1<<31); - - /** Submit the upload descriptor to the NIC **/ - outl(virt_to_bus(&(INF_3C90X.ReceiveUPD)), - INF_3C90X.IOAddr + regUpListPtr_l); - - /** Wait for upload completion (upComplete(15) or upError (14)) **/ - for(i=0;i<40000;i++); - while((INF_3C90X.ReceiveUPD.UpPktStatus & ((1<<14) | (1<<15))) == 0) - for(i=0;i<40000;i++); - - /** Check for Error (else we have good packet) **/ - if (INF_3C90X.ReceiveUPD.UpPktStatus & (1<<14)) + + if (inl(INF_3C90X.IOAddr + regUpListPtr_l) == 0 && pbufs[oldprod]) /* Ran out of shit, and got new shit? */ { - errcode = INF_3C90X.ReceiveUPD.UpPktStatus; - if (errcode & (1<<16)) - outputf("3C90X: Rx Overrun (%hX)",errcode>>16); - else if (errcode & (1<<17)) - outputf("3C90X: Runt Frame (%hX)",errcode>>16); - else if (errcode & (1<<18)) - outputf("3C90X: Alignment Error (%hX)",errcode>>16); - else if (errcode & (1<<19)) - outputf("3C90X: CRC Error (%hX)",errcode>>16); - else if (errcode & (1<<20)) - outputf("3C90X: Oversized Frame (%hX)",errcode>>16); - else - outputf("3C90X: Packet error (%hX)",errcode>>16); - return 0; + outl(INF_3C90X.IOAddr + regUpListPtr_l, v2p(&rxdescs[oldprod])); + outputf("3c90x: WARNING: Ran out of rx slots"); } + +} - /** Ok, got packet. Set length in nic->packetlen. **/ - nic->packetlen = (INF_3C90X.ReceiveUPD.UpPktStatus & 0x1FFF); - - return 1; - } - +/* _recv polls the ring buffer to see if any packets are available. If any + * are, then eth_recv is called for each available. _recv returns how many + * packets it received successfully. Whether _recv got any packets or not, + * _recv does not block, and reinitializes the ring buffer with fresh pbufs. + */ +static int _recv(struct nic *nic) +{ + int errcode, n = 0; + struct pbuf *p; + + /* Nothing to do? */ + while ((rxdescs[rxcons].status & ((1<<14) | (1<<15))) != 0) + { + /** Check for Error (else we have good packet) **/ + if (rxdescs[rxcons].status & (1<<14)) + { + errcode = rxdescs[rxcons].status; + if (errcode & (1<<16)) + outputf("3C90X: Rx Overrun (%hX)",errcode>>16); + else if (errcode & (1<<17)) + outputf("3C90X: Runt Frame (%hX)",errcode>>16); + else if (errcode & (1<<18)) + outputf("3C90X: Alignment Error (%hX)",errcode>>16); + else if (errcode & (1<<19)) + outputf("3C90X: CRC Error (%hX)",errcode>>16); + else if (errcode & (1<<20)) + outputf("3C90X: Oversized Frame (%hX)",errcode>>16); + else + outputf("3C90X: Packet error (%hX)",errcode>>16); + + p = NULL; + pbuf_free(pbufs[rxcons]); /* Bounce the old one before setting it up again. */ + } else { + p = pbufs[rxcons]; + pbuf_realloc(p, rxdescs[rxcons].status & 0x1FFF); /* Resize the packet to how large it actually is. */ + } + + pbufs[rxcons] = NULL; + rxdescs[rxcons].status = 0; + rxcons = (rxcons + 1) % RECV_BUFS; + + if (p) + { + eth_recv(nic, p); + n++; + } + } + _recv_prepare(nic); /* Light the NIC up again. */ + return n; +} /*** a3c90x_disable: exported routine to disable the card. What's this for? *** the eepro100.c driver didn't have one, so I just left this one empty too. @@ -678,8 +667,8 @@ void a3c90x_disable(struct dev *dev) /* reset and disable merge */ a3c90x_reset(); /* Disable the receiver and transmitter. */ - outw(cmdRxDisable, INF_3C90X.IOAddr + regCommandIntStatus_w); - outw(cmdTxDisable, INF_3C90X.IOAddr + regCommandIntStatus_w); + _outw(cmdRxDisable, INF_3C90X.IOAddr + regCommandIntStatus_w); + _outw(cmdTxDisable, INF_3C90X.IOAddr + regCommandIntStatus_w); } @@ -692,7 +681,7 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) INF_3C90X.is3c556 = (pci->did == 0x6055); int i, c; - unsigned short eeprom[0x21]; + unsigned short eeprom[0x100]; unsigned int cfg; unsigned int mopt; unsigned int mstat; @@ -708,14 +697,21 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) } if (ioaddr == 0) - return 0; -/* - adjust_pci_dev(pci); -*/ - nic->ioaddr = ioaddr & ~3; - nic->irqno = 0; - - INF_3C90X.IOAddr = ioaddr & ~3; + { + outputf("3c90x: Unable to find I/O address"); + return 0; + } + + /* Power it on */ + pci_write16(pci->bus, pci->dev, pci->fn, 0xE0, + pci_read16(pci->bus, pci->dev, pci->fn, 0xE0) & ~0x3); + + outputf("3c90x: Picked I/O address %04x", ioaddr); + pci_bother_add(pci); + nic.ioaddr = ioaddr & ~3; + nic.irqno = 0; + + INF_3C90X.IOAddr = ioaddr; INF_3C90X.CurrentWindow = 255; switch (a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, 0x03)) { @@ -741,7 +737,7 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) /** Load the EEPROM contents **/ if (INF_3C90X.isBrev) { - for(i=0;i<=0x20;i++) + for(i=0;i<=/*0x20*/0x7F;i++) { eeprom[i] = a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, i); } @@ -770,7 +766,7 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) } else { - for(i=0;i<=0x17;i++) + for(i=0;i<=/*0x17*/0x7F;i++) { eeprom[i] = a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, i); } @@ -792,19 +788,25 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) INF_3C90X.HWAddr[3] = eeprom[HWADDR_OFFSET + 1]&0xFF; INF_3C90X.HWAddr[4] = eeprom[HWADDR_OFFSET + 2]>>8; INF_3C90X.HWAddr[5] = eeprom[HWADDR_OFFSET + 2]&0xFF; - outputf("MAC Address = %!", INF_3C90X.HWAddr); + outputf("MAC Address = %02x:%02x:%02x:%02x:%02x:%02x", + INF_3C90X.HWAddr[0], + INF_3C90X.HWAddr[1], + INF_3C90X.HWAddr[2], + INF_3C90X.HWAddr[3], + INF_3C90X.HWAddr[4], + INF_3C90X.HWAddr[5]); /** 3C556: Invert MII power **/ if (INF_3C90X.is3c556) { unsigned int tmp; - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winAddressing2); + _set_window(INF_3C90X.IOAddr, winAddressing2); tmp = inw(INF_3C90X.IOAddr + regResetOptions_2_w); tmp |= 0x4000; - outw(tmp, INF_3C90X.IOAddr + regResetOptions_2_w); + _outw(tmp, INF_3C90X.IOAddr + regResetOptions_2_w); } /* Test if the link is good, if not continue */ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winDiagnostics4); + _set_window(INF_3C90X.IOAddr, winDiagnostics4); mstat = inw(INF_3C90X.IOAddr + regMediaStatus_4_w); if((mstat & (1<<11)) == 0) { outputf("Valid link not established"); @@ -812,19 +814,13 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) } /** Program the MAC address into the station address registers **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winAddressing2); - outw(htons(eeprom[HWADDR_OFFSET + 0]), INF_3C90X.IOAddr + regStationAddress_2_3w); - outw(htons(eeprom[HWADDR_OFFSET + 1]), INF_3C90X.IOAddr + regStationAddress_2_3w+2); - outw(htons(eeprom[HWADDR_OFFSET + 2]), INF_3C90X.IOAddr + regStationAddress_2_3w+4); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4); - - /** Fill in our entry in the etherboot arp table **/ -/* XXX ? for lwip? - for(i=0;inode_addr[i] = (eeprom[HWADDR_OFFSET + i/2] >> (8*((i&1)^1))) & 0xff; -*/ + _set_window(INF_3C90X.IOAddr, winAddressing2); + _outw(htons(eeprom[HWADDR_OFFSET + 0]), INF_3C90X.IOAddr + regStationAddress_2_3w); + _outw(htons(eeprom[HWADDR_OFFSET + 1]), INF_3C90X.IOAddr + regStationAddress_2_3w+2); + _outw(htons(eeprom[HWADDR_OFFSET + 2]), INF_3C90X.IOAddr + regStationAddress_2_3w+4); + _outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0); + _outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2); + _outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4); /** Read the media options register, print a message and set default ** xcvr. @@ -832,7 +828,7 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) ** Uses Media Option command on B revision, Reset Option on non-B ** revision cards -- same register address **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); + _set_window(INF_3C90X.IOAddr, winTxRxOptions3); mopt = inw(INF_3C90X.IOAddr + regResetMediaOptions_3_w); /** mask out VCO bit that is defined as 10baseFL bit on B-rev cards **/ @@ -846,45 +842,44 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) linktype = 0x0008; if (mopt & 0x01) { - outputf("%s100Base-T4",(c++)?", ":""); + outputf(" 100Base-T4"); linktype = 0x0006; } if (mopt & 0x04) { - outputf("%s100Base-FX",(c++)?", ":""); + outputf(" 100Base-FX"); linktype = 0x0005; } if (mopt & 0x10) { - outputf("%s10Base-2",(c++)?", ":""); + outputf(" 10Base-2"); linktype = 0x0003; } if (mopt & 0x20) { - outputf("%sAUI",(c++)?", ":""); + outputf(" AUI"); linktype = 0x0001; } if (mopt & 0x40) { - outputf("%sMII",(c++)?", ":""); + outputf(" MII"); linktype = 0x0006; } if ((mopt & 0xA) == 0xA) { - outputf("%s10Base-T / 100Base-TX",(c++)?", ":""); + outputf(" 10Base-T / 100Base-TX"); linktype = 0x0008; } else if ((mopt & 0xA) == 0x2) { - outputf("%s100Base-TX",(c++)?", ":""); + outputf(" 100Base-TX"); linktype = 0x0008; } else if ((mopt & 0xA) == 0x8) { - outputf("%s10Base-T",(c++)?", ":""); + outputf(" 10Base-T"); linktype = 0x0008; } - outputf("."); /** Determine transceiver type to use, depending on value stored in ** eeprom 0x16 @@ -917,54 +912,53 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) /** enable DC converter for 10-Base-T **/ if (linktype == 0x0003) { - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdEnableDcConverter, 0); + _issue_command(INF_3C90X.IOAddr, cmdEnableDcConverter, 0); } /** Set the link to the type we just determined. **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); + _set_window(INF_3C90X.IOAddr, winTxRxOptions3); cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l); cfg &= ~(0xF<<20); cfg |= (linktype<<20); - outl(cfg, INF_3C90X.IOAddr + regInternalConfig_3_l); + _outl(cfg, INF_3C90X.IOAddr + regInternalConfig_3_l); /** Now that we set the xcvr type, reset the Tx and Rx, re-enable. **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxReset, 0x00); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) - ; - + _issue_command(INF_3C90X.IOAddr, cmdTxReset, 0); if (!INF_3C90X.isBrev) - outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b); + _outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); + _issue_command(INF_3C90X.IOAddr, cmdTxEnable, 0); /** ** reset of the receiver on B-revision cards re-negotiates the link ** takes several seconds (a computer eternity) **/ if (INF_3C90X.isBrev) - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x04); + _issue_command(INF_3C90X.IOAddr, cmdRxReset, 0x04); else - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x00); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) - ; + _issue_command(INF_3C90X.IOAddr, cmdRxReset, 0x00); /** Set the RX filter = receive only individual pkts & multicast & bcast. **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdSetRxFilter, 0x01 + 0x02 + 0x04); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxEnable, 0); - + _issue_command(INF_3C90X.IOAddr, cmdSetRxFilter, 0x01 + 0x02 + 0x04); + + /* Stick some packets in the queue. */ + _recv_prepare(&nic); + + /* And light up the RX engine. */ + _issue_command(INF_3C90X.IOAddr, cmdRxEnable, 0); /** ** set Indication and Interrupt flags , acknowledge any IRQ's **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdSetInterruptEnable, 0); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdSetIndicationEnable, 0x0014); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdAcknowledgeInterrupt, 0x661); + _issue_command(INF_3C90X.IOAddr, cmdSetInterruptEnable, 0); + _issue_command(INF_3C90X.IOAddr, cmdSetIndicationEnable, 0x0014); + _issue_command(INF_3C90X.IOAddr, cmdAcknowledgeInterrupt, 0x661); /* * Set our exported functions **/ - nic->poll = a3c90x_poll; - nic->transmit = a3c90x_transmit; + nic.recv = _recv; + nic.transmit = _transmit; + memcpy(nic.hwaddr, INF_3C90X.HWAddr, 6); + eth_register(&nic); return 1; }