X-Git-Url: http://git.joshuawise.com/netwatch.git/blobdiff_plain/748534f490f9da36041ad8e2ecc046c6a8238d81..740eaa87b6bc35dbf35e43854635b2cf02ca3398:/net/3c90x.c diff --git a/net/3c90x.c b/net/3c90x.c index e7b95e9..d405352 100644 --- a/net/3c90x.c +++ b/net/3c90x.c @@ -1,10 +1,12 @@ /* - * 3c90x.c -- This file implements the 3c90x driver for etherboot. Written - * by Greg Beeley, Greg.Beeley@LightSys.org. Modified by Steve Smith, - * Steve.Smith@Juno.Com. Alignment bug fix Neil Newell (nn@icenoir.net). + * 3c90x.c + * NetWatch * - * This program Copyright (C) 1999 LightSys Technology Services, Inc. - * Portions Copyright (C) 1999 Steve Smith + * A ring buffer-based, bus-mastering Ethernet driver. + * + * Derived from Etherboot's 3c90x.c, which is + * Copyright (C) 1999 LightSys Technology Services, Inc. + * Portions Copyright (C) 1999 Steve Smith * * This program may be re-distributed in source or binary form, modified, * sold, or copied for any purpose, provided that the above copyright message @@ -15,13 +17,6 @@ * PURPOSE or MERCHANTABILITY. Please read the associated documentation * "3c90x.txt" before compiling and using this driver. * - * -------- - * - * Program written with the assistance of the 3com documentation for - * the 3c905B-TX card, as well as with some assistance from the 3c59x - * driver Donald Becker wrote for the Linux kernel, and with some assistance - * from the remainder of the Etherboot distribution. - * * REVISION HISTORY: * * v0.10 1-26-1998 GRB Initial implementation. @@ -31,25 +26,24 @@ * Re-wrote poll and transmit for * better error recovery and heavy * network traffic operation - * v2.01 5-26-2003 NN Fixed driver alignment issue which - * caused system lockups if driver structures - * not 8-byte aligned. + * v2.01 5-26-2003 NN Fixed driver alignment issue which + * caused system lockups if driver structures + * not 8-byte aligned. + * NetWatch0 12-07-2008 JAW Taken out back and shot. * */ #include "etherboot-compat.h" +#include "net.h" #include #include #include +#include #include #include +#include #define XCVR_MAGIC (0x5A00) -/** any single transmission fails after 16 collisions or other errors - ** this is the number of times to retry the transmission -- this should - ** be plenty - **/ -#define XMIT_RETRIES 250 /*** Register definitions for the 3c905 ***/ enum Registers @@ -215,516 +209,454 @@ enum Commands #define INT_CMDINPROGRESS (1<<12) #define INT_WINDOWNUMBER (7<<13) +/* These structures are all 64-bit aligned, as needed for bus-mastering I/O. */ +typedef struct { + unsigned int addr; + unsigned int len; +} segment_t __attribute__ ((aligned(8))); -/*** TX descriptor ***/ -typedef struct - { - unsigned int DnNextPtr; - unsigned int FrameStartHeader; - unsigned int HdrAddr; - unsigned int HdrLength; - unsigned int DataAddr; - unsigned int DataLength; - } - TXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */ +typedef struct { + unsigned int next; + unsigned int hdr; + segment_t segments[64 /* XXX magic */]; +} txdesc_t __attribute__ ((aligned(8))); /*** RX descriptor ***/ -typedef struct - { - unsigned int UpNextPtr; - unsigned int UpPktStatus; - unsigned int DataAddr; - unsigned int DataLength; - } - RXD __attribute__ ((aligned(8))); /* 64-bit aligned for bus mastering */ - -/*** Global variables ***/ -static struct - { - unsigned int is3c556; - unsigned char isBrev; - unsigned char CurrentWindow; - unsigned int IOAddr; - unsigned char HWAddr[ETH_ALEN]; - TXD TransmitDPD; - RXD ReceiveUPD; - } - INF_3C90X; - - -/*** a3c90x_internal_IssueCommand: sends a command to the 3c90x card - ***/ -static int -a3c90x_internal_IssueCommand(int ioaddr, int cmd, int param) - { - unsigned int val; +typedef struct { + unsigned int next; + unsigned int status; + segment_t segments[64]; +} rxdesc_t __attribute__ ((aligned(8))); + +typedef struct { + struct nic nic; + int is3c556; + int isBrev; + int curwnd; + int ioaddr; +} nic_3c90x_t; + +static nic_3c90x_t _nic; + +#define _inb(n,a) (inb((n)->ioaddr + (a))) +#define _inw(n,a) (inw((n)->ioaddr + (a))) +#define _inl(n,a) (inl((n)->ioaddr + (a))) - /** Build the cmd. **/ - val = cmd; - val <<= 11; - val |= param; +#define _outb(n,a,d) (outb((n)->ioaddr + (a), (d))) +#define _outw(n,a,d) (outw((n)->ioaddr + (a), (d))) +#define _outl(n,a,d) (outl((n)->ioaddr + (a), (d))) - /** Send the cmd to the cmd register **/ - outw(val, ioaddr + regCommandIntStatus_w); - /** Wait for the cmd to complete, if necessary **/ - while (inw(ioaddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); +static int _issue_command(nic_3c90x_t *nic, int cmd, int param) +{ + _outw(nic, regCommandIntStatus_w, (cmd << 11) | param); + + while (_inw(nic, regCommandIntStatus_w) & INT_CMDINPROGRESS) + ; - return 0; - } + return 0; +} /*** a3c90x_internal_SetWindow: selects a register window set. ***/ -static int -a3c90x_internal_SetWindow(int ioaddr, int window) - { - - /** Window already as set? **/ - if (INF_3C90X.CurrentWindow == window) return 0; +static int _set_window(nic_3c90x_t *nic, int window) +{ + if (nic->curwnd == window) + return 0; - /** Issue the window command. **/ - a3c90x_internal_IssueCommand(ioaddr, cmdSelectRegisterWindow, window); - INF_3C90X.CurrentWindow = window; + _issue_command(nic, cmdSelectRegisterWindow, window); + nic->curwnd = window; - return 0; - } + return 0; +} -/*** a3c90x_internal_ReadEeprom - read data from the serial eeprom. +/*** _read_eeprom - read data from the serial eeprom. ***/ static unsigned short -a3c90x_internal_ReadEeprom(int ioaddr, int address) - { - unsigned short val; +_read_eeprom(nic_3c90x_t *nic, int address) +{ + unsigned short val; /** Select correct window **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winEepromBios0); + _set_window(nic, winEepromBios0); /** Make sure the eeprom isn't busy **/ - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); + do + { + int i; + for (i = 0; i < 165; i++) + inb(0x80); /* wait 165 usec */ + } + while(0x8000 & _inw(nic, regEepromCommand_0_w)); /** Read the value. **/ - if (INF_3C90X.is3c556) - { - outw(address + (0x230), ioaddr + regEepromCommand_0_w); - } + if (nic->is3c556) + _outw(nic, regEepromCommand_0_w, address + 0x230); else - { - outw(address + ((0x02)<<6), ioaddr + regEepromCommand_0_w); - } - - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); - val = inw(ioaddr + regEepromData_0_w); - - return val; - } - - -#ifdef CFG_3C90X_BOOTROM_FIX -/*** a3c90x_internal_WriteEepromWord - write a physical word of - *** data to the onboard serial eeprom (not the BIOS prom, but the - *** nvram in the card that stores, among other things, the MAC - *** address). - ***/ -static int -a3c90x_internal_WriteEepromWord(int ioaddr, int address, unsigned short value) - { - /** Select register window **/ - a3c90x_internal_SetWindow(ioaddr, winEepromBios0); - - /** Verify Eeprom not busy **/ - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); + _outw(nic, regEepromCommand_0_w, address + 0x80); - /** Issue WriteEnable, and wait for completion. **/ - outw(0x30, ioaddr + regEepromCommand_0_w); - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); - - /** Issue EraseRegister, and wait for completion. **/ - outw(address + ((0x03)<<6), ioaddr + regEepromCommand_0_w); - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); - - /** Send the new data to the eeprom, and wait for completion. **/ - outw(value, ioaddr + regEepromData_0_w); - outw(0x30, ioaddr + regEepromCommand_0_w); - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); - - /** Burn the new data into the eeprom, and wait for completion. **/ - outw(address + ((0x01)<<6), ioaddr + regEepromCommand_0_w); - while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); - - return 0; - } -#endif + do + { + int i; + for (i = 0; i < 165; i++) + inb(0x80); /* wait 165 usec */ + } + while(0x8000 & _inw(nic, regEepromCommand_0_w)); + val = _inw(nic, regEepromData_0_w); + + return val; +} -#ifdef CFG_3C90X_BOOTROM_FIX -/*** a3c90x_internal_WriteEeprom - write data to the serial eeprom, - *** and re-compute the eeprom checksum. - ***/ -static int -a3c90x_internal_WriteEeprom(int ioaddr, int address, unsigned short value) - { - int cksum = 0,v; - int i; - int maxAddress, cksumAddress; - - if (INF_3C90X.isBrev) - { - maxAddress=0x1f; - cksumAddress=0x20; - } - else - { - maxAddress=0x16; - cksumAddress=0x17; - } - - /** Write the value. **/ - if (a3c90x_internal_WriteEepromWord(ioaddr, address, value) == -1) - return -1; - - /** Recompute the checksum. **/ - for(i=0;i<=maxAddress;i++) - { - v = a3c90x_internal_ReadEeprom(ioaddr, i); - cksum ^= (v & 0xFF); - cksum ^= ((v>>8) & 0xFF); - } - /** Write the checksum to the location in the eeprom **/ - if (a3c90x_internal_WriteEepromWord(ioaddr, cksumAddress, cksum) == -1) - return -1; - - return 0; - } -#endif +#if 0 /*** a3c90x_reset: exported function that resets the card to its default *** state. This is so the Linux driver can re-set the card up the way *** it wants to. If CFG_3C90X_PRESERVE_XCVR is defined, then the reset will *** not alter the selected transceiver that we used to download the boot *** image. ***/ -static void a3c90x_reset(void) - { -#ifdef CFG_3C90X_PRESERVE_XCVR - int cfg; - /** Read the current InternalConfig value. **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); - cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l); -#endif - +static void _reset(nic_3c90x_t *nic) +{ /** Send the reset command to the card **/ - outputf("Issuing RESET:"); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdGlobalReset, 0); - - /** wait for reset command to complete **/ - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); + outputf("3c90x: issuing RESET"); + _issue_command(nic, cmdGlobalReset, 0); /** global reset command resets station mask, non-B revision cards ** require explicit reset of values **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winAddressing2); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4); - -#ifdef CFG_3C90X_PRESERVE_XCVR - /** Re-set the original InternalConfig value from before reset **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); - outl(cfg, INF_3C90X.IOAddr + regInternalConfig_3_l); - - /** enable DC converter for 10-Base-T **/ - if ((cfg&0x0300) == 0x0300) - { - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdEnableDcConverter, 0); - } -#endif + _set_window(nic, winAddressing2); + _outw(nic, regStationMask_2_3w+0, 0); + _outw(nic, regStationMask_2_3w+2, 0); + _outw(nic, regStationMask_2_3w+4, 0); /** Issue transmit reset, wait for command completion **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxReset, 0); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) - ; - if (! INF_3C90X.isBrev) - outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); + _issue_command(nic, cmdTxReset, 0); + if (!nic->isBrev) + _outb(nic, regTxFreeThresh_b, 0x01); + _issue_command(nic, cmdTxEnable, 0); /** ** reset of the receiver on B-revision cards re-negotiates the link ** takes several seconds (a computer eternity) **/ - if (INF_3C90X.isBrev) - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x04); + if (nic->isBrev) + _issue_command(nic, cmdRxReset, 0x04); else - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x00); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); - ; - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxEnable, 0); + _issue_command(nic, cmdRxReset, 0x00); + _issue_command(nic, cmdRxEnable, 0); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdSetInterruptEnable, 0); + _issue_command(nic, cmdSetInterruptEnable, 0); /** enable rxComplete and txComplete **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdSetIndicationEnable, 0x0014); + _issue_command(nic, cmdSetIndicationEnable, 0x0014); /** acknowledge any pending status flags **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdAcknowledgeInterrupt, 0x661); + _issue_command(nic, cmdAcknowledgeInterrupt, 0x661); return; - } +} +#endif +/***************************** Transmit routines *****************************/ +#define XMIT_BUFS 8 -/*** a3c90x_transmit: exported function that transmits a packet. Does not - *** return any particular status. Parameters are: - *** dest_addr[6] - destination address, ethernet; - *** proto - protocol type (ARP, IP, etc); - *** size - size of the non-header part of the packet that needs transmitted; - *** pkt - the pointer to the packet data itself. - ***/ -static void -a3c90x_transmit(const char *dest_addr, unsigned int proto, - unsigned int size, const char *pkt) - { +static txdesc_t txdescs[XMIT_BUFS]; +static struct pbuf *txpbufs[XMIT_BUFS] = {0,}; - struct eth_hdr - { - unsigned char dst_addr[ETH_ALEN]; - unsigned char src_addr[ETH_ALEN]; - unsigned short type; - } hdr; +/* txcons is the index into the ring buffer of the last packet that the + * 3c90x was seen processing, or -1 if the 3c90x was idle. + */ +static int txcons = -1; - unsigned char status; - unsigned i, retries; +/* txprod is the index of the _next_ buffer that the driver will write into. */ +static int txprod = 0; - for (retries=0; retries < XMIT_RETRIES ; retries++) +/* _transmit adds a packet to the transmit ring buffer. If no space is + * available in the buffer, then _transmit blocks until a packet has been + * transmitted. + */ +static void _transmit(struct nic *_nic, struct pbuf *p) +{ + nic_3c90x_t *nic = (nic_3c90x_t *)_nic; + unsigned char status; + int len, n; + + /* Wait for there to be space. */ + if (txcons == txprod) { - /** Stall the download engine **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdStallCtl, 2); - - /** Make sure the card is not waiting on us **/ - inw(INF_3C90X.IOAddr + regCommandIntStatus_w); - inw(INF_3C90X.IOAddr + regCommandIntStatus_w); - - while (inw(INF_3C90X.IOAddr+regCommandIntStatus_w) & - INT_CMDINPROGRESS) - ; - - /** Set the ethernet packet type **/ - hdr.type = htons(proto); - - /** Copy the destination address **/ - memcpy(hdr.dst_addr, dest_addr, ETH_ALEN); - - /** Copy our MAC address **/ - memcpy(hdr.src_addr, INF_3C90X.HWAddr, ETH_ALEN); - - /** Setup the DPD (download descriptor) **/ - INF_3C90X.TransmitDPD.DnNextPtr = 0; - /** set notification for transmission completion (bit 15) **/ - INF_3C90X.TransmitDPD.FrameStartHeader = (size + sizeof(hdr)) | 0x8000; - INF_3C90X.TransmitDPD.HdrAddr = virt_to_bus(&hdr); - INF_3C90X.TransmitDPD.HdrLength = sizeof(hdr); - INF_3C90X.TransmitDPD.DataAddr = virt_to_bus(pkt); - INF_3C90X.TransmitDPD.DataLength = size + (1<<31); - - /** Send the packet **/ - outl(virt_to_bus(&(INF_3C90X.TransmitDPD)), - INF_3C90X.IOAddr + regDnListPtr_l); - - /** End Stall and Wait for upload to complete. **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdStallCtl, 3); - while(inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) - ; - - /** Wait for NIC Transmit to Complete **/ - oneshot_start_ms(10); /* Give it 10 ms */ - while (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0004) && - oneshot_running()) - ; - - if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0004)) - { - outputf("3C90X: Tx Timeout"); - continue; - } - - status = inb(INF_3C90X.IOAddr + regTxStatus_b); + int i = 0; + + outputf("3c90x: txbuf full, waiting for space..."); + while (_inl(nic, regDnListPtr_l) != 0) + i++; + outputf("3c90x: took %d iters", i); + } + + /* Stall the download engine so it doesn't bother us. */ + _issue_command(nic, cmdStallCtl, 2 /* Stall download */); + + /* Clean up old txcons. */ + if (txcons != -1) + { + unsigned long curp = _inl(nic, regDnListPtr_l); + int end; + + if (curp == 0) + end = txprod; + else + end = (curp - v2p(txdescs)) / sizeof(txdescs[0]); + + while (txcons != end) + { + pbuf_free(txpbufs[txcons]); + txpbufs[txcons] = NULL; + txdescs[txcons].hdr = 0; + txdescs[txcons].next = 0; + txcons = (txcons + 1) % XMIT_BUFS; + } + if (txcons == txprod) + txcons = -1; + } + + /* Look at the TX status */ + status = _inb(nic, regTxStatus_b); + if (status) + { + outputf("3c90x: error: the nus."); + _outb(nic, regTxStatus_b, 0x00); + } - /** acknowledge transmit interrupt by writing status **/ - outb(0x00, INF_3C90X.IOAddr + regTxStatus_b); + /* Set up the new txdesc. */ + txdescs[txprod].next = 0; + len = 0; + n = 0; + txpbufs[txprod] = p; + pbuf_ref(p); + for (; p; p = p->next) + { + txdescs[txprod].segments[n].addr = v2p(p->payload); + txdescs[txprod].segments[n].len = p->len | (p->next ? 0 : (1 << 31)); + len += p->len; + n++; + } + txdescs[txprod].hdr = len; /* If we wanted completion notification, bit 15 */ + + /* Now link the new one in, after it's been set up. */ + txdescs[(txprod + XMIT_BUFS - 1) % XMIT_BUFS].next = v2p(&(txdescs[txprod])); + + /* If the card is stopped, start it up again. */ + if (_inl(nic, regDnListPtr_l) == 0) + { + _outl(nic, regDnListPtr_l, v2p(&(txdescs[txprod]))); + txcons = txprod; + } + + txprod = (txprod + 1) % XMIT_BUFS; + + /* And let it proceed on its way. */ + _issue_command(nic, cmdStallCtl, 3 /* Unstall download */); +#if 0 /** successful completion (sans "interrupt Requested" bit) **/ if ((status & 0xbf) == 0x80) - return; + return; - outputf("3C90X: Status (%hhX)", status); + outputf("3c90x: Status (%hhX)", status); /** check error codes **/ if (status & 0x02) - { - outputf("3C90X: Tx Reclaim Error (%hhX)", status); - a3c90x_reset(); - } - else if (status & 0x04) - { - outputf("3C90X: Tx Status Overflow (%hhX)", status); - for (i=0; i<32; i++) - outb(0x00, INF_3C90X.IOAddr + regTxStatus_b); - /** must re-enable after max collisions before re-issuing tx **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); - } - else if (status & 0x08) - { - outputf("3C90X: Tx Max Collisions (%hhX)", status); - /** must re-enable after max collisions before re-issuing tx **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); - } - else if (status & 0x10) - { - outputf("3C90X: Tx Underrun (%hhX)", status); - a3c90x_reset(); - } - else if (status & 0x20) - { - outputf("3C90X: Tx Jabber (%hhX)", status); - a3c90x_reset(); - } - else if ((status & 0x80) != 0x80) - { - outputf("3C90X: Internal Error - Incomplete Transmission (%hhX)", - status); - a3c90x_reset(); - } + { + outputf("3c90x: Tx Reclaim Error (%hhX)", status); + _reset(nic); + } else if (status & 0x04) { + outputf("3c90x: Tx Status Overflow (%hhX)", status); + for (i=0; i<32; i++) + _outb(nic, regTxStatus_b, 0x00); + /** must re-enable after max collisions before re-issuing tx **/ + _issue_command(nic, cmdTxEnable, 0); + } else if (status & 0x08) { + outputf("3c90x: Tx Max Collisions (%hhX)", status); + /** must re-enable after max collisions before re-issuing tx **/ + _issue_command(nic, cmdTxEnable, 0); + } else if (status & 0x10) { + outputf("3c90x: Tx Underrun (%hhX)", status); + _reset(nic); + } else if (status & 0x20) { + outputf("3c90x: Tx Jabber (%hhX)", status); + _reset(nic); + } else if ((status & 0x80) != 0x80) { + outputf("3c90x: Internal Error - Incomplete Transmission (%hhX)", status); + _reset(nic); } +#endif +} - /** failed after RETRY attempts **/ - outputf("Failed to send after %d retries", retries); - return; +/***************************** Receive routines *****************************/ +#define MAX_RECV_SIZE 1536 +#define RECV_BUFS 32 - } +static rxdesc_t rxdescs[RECV_BUFS]; +static struct pbuf *rxpbufs[RECV_BUFS] = {0,}; +/* rxcons is the pointer to the receive descriptor that the ethernet card will + * write into next. + */ +static int rxcons = 0; +/* rxprod is the pointer to the receive descriptor that the driver will + * allocate next. + */ +static int rxprod = 0; -/*** a3c90x_poll: exported routine that waits for a certain length of time - *** for a packet, and if it sees none, returns 0. This routine should - *** copy the packet to nic->packet if it gets a packet and set the size - *** in nic->packetlen. Return 1 if a packet was found. - ***/ -static int -a3c90x_poll(struct nic *nic, int retrieve) - { - int i, errcode; +/* _recv_prepare fills the 3c90x's ring buffer with fresh pbufs from lwIP. + * The upload engine need not be stalled. + */ +static void _recv_prepare(nic_3c90x_t *nic) +{ + int oldprod; - if (!(inw(INF_3C90X.IOAddr + regCommandIntStatus_w)&0x0010)) + oldprod = rxprod; + while ((rxprod != rxcons) || !rxpbufs[rxprod]) { - return 0; + int i; + struct pbuf *p; + + if (!rxpbufs[rxprod]) + rxpbufs[rxprod] = p = pbuf_alloc(PBUF_RAW, MAX_RECV_SIZE, PBUF_POOL); + else { + outputf("WARNING: 3c90x has pbuf in slot %d", rxprod); + p = rxpbufs[rxprod]; + } + + if (!p) + { + outputf("3c90x: out of memory for rx pbuf?"); + break; + } + + rxdescs[rxprod].status = 0; + rxdescs[rxprod].next = 0; + for (i = 0; p; p = p->next, i++) + { + rxdescs[rxprod].segments[i].addr = v2p(p->payload); + rxdescs[rxprod].segments[i].len = p->len | (p->next ? 0 : (1 << 31)); + } + + /* Hook in the new one after and only after it's been fully set up. */ + rxdescs[(rxprod + RECV_BUFS - 1) % RECV_BUFS].next = v2p(&(rxdescs[rxprod])); + rxprod = (rxprod + 1) % RECV_BUFS; } - - if ( ! retrieve ) return 1; - - /** we don't need to acknowledge rxComplete -- the upload engine - ** does it for us. - **/ - - /** Build the up-load descriptor **/ - INF_3C90X.ReceiveUPD.UpNextPtr = 0; - INF_3C90X.ReceiveUPD.UpPktStatus = 0; - INF_3C90X.ReceiveUPD.DataAddr = virt_to_bus(nic->packet); - INF_3C90X.ReceiveUPD.DataLength = 1536 + (1<<31); - - /** Submit the upload descriptor to the NIC **/ - outl(virt_to_bus(&(INF_3C90X.ReceiveUPD)), - INF_3C90X.IOAddr + regUpListPtr_l); - - /** Wait for upload completion (upComplete(15) or upError (14)) **/ - for(i=0;i<40000;i++); - while((INF_3C90X.ReceiveUPD.UpPktStatus & ((1<<14) | (1<<15))) == 0) - for(i=0;i<40000;i++); - - /** Check for Error (else we have good packet) **/ - if (INF_3C90X.ReceiveUPD.UpPktStatus & (1<<14)) + + if (_inl(nic, regUpListPtr_l) == 0 && rxpbufs[oldprod]) /* Ran out of shit, and got new shit? */ { - errcode = INF_3C90X.ReceiveUPD.UpPktStatus; - if (errcode & (1<<16)) - outputf("3C90X: Rx Overrun (%hX)",errcode>>16); - else if (errcode & (1<<17)) - outputf("3C90X: Runt Frame (%hX)",errcode>>16); - else if (errcode & (1<<18)) - outputf("3C90X: Alignment Error (%hX)",errcode>>16); - else if (errcode & (1<<19)) - outputf("3C90X: CRC Error (%hX)",errcode>>16); - else if (errcode & (1<<20)) - outputf("3C90X: Oversized Frame (%hX)",errcode>>16); - else - outputf("3C90X: Packet error (%hX)",errcode>>16); - return 0; + _outl(nic, regUpListPtr_l, v2p(&rxdescs[oldprod])); + outputf("3c90x: WARNING: Ran out of rx slots"); } + + _issue_command(nic, cmdStallCtl, 1 /* Unstall upload */); +} - /** Ok, got packet. Set length in nic->packetlen. **/ - nic->packetlen = (INF_3C90X.ReceiveUPD.UpPktStatus & 0x1FFF); - - return 1; - } - - - -/*** a3c90x_disable: exported routine to disable the card. What's this for? - *** the eepro100.c driver didn't have one, so I just left this one empty too. - *** Ideas anyone? - *** Must turn off receiver at least so stray packets will not corrupt memory - *** [Ken] - ***/ -void a3c90x_disable(struct dev *dev) +/* _recv polls the ring buffer to see if any packets are available. If any + * are, then eth_recv is called for each available. _recv returns how many + * packets it received successfully. Whether _recv got any packets or not, + * _recv does not block, and reinitializes the ring buffer with fresh pbufs. + */ +static int _recv(struct nic *_nic) { - /* reset and disable merge */ - a3c90x_reset(); - /* Disable the receiver and transmitter. */ - outw(cmdRxDisable, INF_3C90X.IOAddr + regCommandIntStatus_w); - outw(cmdTxDisable, INF_3C90X.IOAddr + regCommandIntStatus_w); -} + nic_3c90x_t *nic = (nic_3c90x_t *)_nic; + int errcode, n = 0; + struct pbuf *p; + + /* Nothing to do? */ + while ((rxdescs[rxcons].status & ((1<<14) | (1<<15))) != 0) + { + /** Check for Error (else we have good packet) **/ + if (rxdescs[rxcons].status & (1<<14)) + { + errcode = rxdescs[rxcons].status; + if (errcode & (1<<16)) + outputf("3C90X: Rx Overrun (%hX)",errcode>>16); + else if (errcode & (1<<17)) + outputf("3C90X: Runt Frame (%hX)",errcode>>16); + else if (errcode & (1<<18)) + outputf("3C90X: Alignment Error (%hX)",errcode>>16); + else if (errcode & (1<<19)) + outputf("3C90X: CRC Error (%hX)",errcode>>16); + else if (errcode & (1<<20)) + outputf("3C90X: Oversized Frame (%hX)",errcode>>16); + else + outputf("3C90X: Packet error (%hX)",errcode>>16); + + p = NULL; + pbuf_free(rxpbufs[rxcons]); /* Bounce the old one before setting it up again. */ + } else { + p = rxpbufs[rxcons]; + pbuf_realloc(p, rxdescs[rxcons].status & 0x1FFF); /* Resize the packet to how large it actually is. */ + } + + rxpbufs[rxcons] = NULL; + rxdescs[rxcons].status = 0; + rxcons = (rxcons + 1) % RECV_BUFS; + + if (p) + { + eth_recv(_nic, p); + n++; + } + } + _recv_prepare(nic); /* Light the NIC up again. */ + return n; +} /*** a3c90x_probe: exported routine to probe for the 3c905 card and perform *** initialization. If this routine is called, the pci functions did find the *** card. We just have to init it here. ***/ -static int a3c90x_probe(struct pci_dev * pci, void * data) +static int _probe(struct pci_dev *pci, void *data) { - struct nic *nic = (struct nic *)data; - INF_3C90X.is3c556 = (pci->did == 0x6055); - - int i, c; - unsigned short eeprom[0x21]; - unsigned int cfg; - unsigned int mopt; - unsigned int mstat; - unsigned short linktype; + nic_3c90x_t *nic = &_nic; + int i, c; + unsigned short eeprom[0x100]; + unsigned int cfg; + unsigned int mopt; + unsigned int mstat; + unsigned short linktype; #define HWADDR_OFFSET 10 - unsigned long ioaddr = 0; - for (i = 0; i < 6; i++) { - if (pci->bars[i].type == PCI_BAR_IO) { - ioaddr = pci->bars[i].addr; - break; - } - } - - if (ioaddr == 0) - return 0; -/* - adjust_pci_dev(pci); -*/ - nic->ioaddr = ioaddr & ~3; - nic->irqno = 0; - - INF_3C90X.IOAddr = ioaddr & ~3; - INF_3C90X.CurrentWindow = 255; - switch (a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, 0x03)) + unsigned long ioaddr = 0; + for (i = 0; i < 6; i++) + if (pci->bars[i].type == PCI_BAR_IO) + { + ioaddr = pci->bars[i].addr; + break; + } + + if (ioaddr == 0) + { + outputf("3c90x: Unable to find I/O address"); + return 0; + } + + /* Power it on */ + pci_write16(pci->bus, pci->dev, pci->fn, 0xE0, + pci_read16(pci->bus, pci->dev, pci->fn, 0xE0) & ~0x3); + + outputf("3c90x: Picked I/O address %04x", ioaddr); + pci_bother_add(pci); + nic->nic.ioaddr = ioaddr & ~3; + nic->nic.irqno = 0; + + nic->ioaddr = ioaddr; + nic->is3c556 = (pci->did == 0x6055); + nic->curwnd = 255; + switch (_read_eeprom(nic, 0x03)) { case 0x9000: /** 10 Base TPO **/ case 0x9001: /** 10/100 T4 **/ case 0x9050: /** 10/100 TPO **/ case 0x9051: /** 10 Base Combo **/ - INF_3C90X.isBrev = 0; + nic->isBrev = 0; break; case 0x9004: /** 10 Base TPO **/ @@ -735,272 +667,186 @@ static int a3c90x_probe(struct pci_dev * pci, void * data) case 0x9056: /** 10/100 T4 **/ case 0x905A: /** 10 Base FX **/ default: - INF_3C90X.isBrev = 1; + nic->isBrev = 1; break; } - /** Load the EEPROM contents **/ - if (INF_3C90X.isBrev) - { - for(i=0;i<=0x20;i++) - { - eeprom[i] = a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, i); - } - -#ifdef CFG_3C90X_BOOTROM_FIX - /** Set xcvrSelect in InternalConfig in eeprom. **/ - /* only necessary for 3c905b revision cards with boot PROM bug!!! */ - a3c90x_internal_WriteEeprom(INF_3C90X.IOAddr, 0x13, 0x0160); -#endif - -#ifdef CFG_3C90X_XCVR - if (CFG_3C90X_XCVR == 255) - { - /** Clear the LanWorks register **/ - a3c90x_internal_WriteEeprom(INF_3C90X.IOAddr, 0x16, 0); - } + /** Load the EEPROM contents **/ + if (nic->isBrev) + for(i=0;i<=0x20;i++) + eeprom[i] = _read_eeprom(nic, i); else - { - /** Set the selected permanent-xcvrSelect in the - ** LanWorks register - **/ - a3c90x_internal_WriteEeprom(INF_3C90X.IOAddr, 0x16, - XCVR_MAGIC + ((CFG_3C90X_XCVR) & 0x000F)); - } -#endif - } - else - { - for(i=0;i<=0x17;i++) - { - eeprom[i] = a3c90x_internal_ReadEeprom(INF_3C90X.IOAddr, i); - } - } - - /** Print identification message **/ -#ifdef CFG_3C90X_BOOTROM_FIX - if (INF_3C90X.isBrev) - { - outputf("NOTE: 3c905b bootrom fix enabled; has side " - "effects. See 3c90x.txt for info."); + for(i=0;i<=0x17;i++) + eeprom[i] = _read_eeprom(nic, i); + + /** Retrieve the Hardware address and print it on the screen. **/ + nic->nic.hwaddr[0] = eeprom[HWADDR_OFFSET + 0]>>8; + nic->nic.hwaddr[1] = eeprom[HWADDR_OFFSET + 0]&0xFF; + nic->nic.hwaddr[2] = eeprom[HWADDR_OFFSET + 1]>>8; + nic->nic.hwaddr[3] = eeprom[HWADDR_OFFSET + 1]&0xFF; + nic->nic.hwaddr[4] = eeprom[HWADDR_OFFSET + 2]>>8; + nic->nic.hwaddr[5] = eeprom[HWADDR_OFFSET + 2]&0xFF; + outputf("MAC Address = %02x:%02x:%02x:%02x:%02x:%02x", + nic->nic.hwaddr[0], nic->nic.hwaddr[1], + nic->nic.hwaddr[2], nic->nic.hwaddr[3], + nic->nic.hwaddr[4], nic->nic.hwaddr[5]); + + /** 3C556: Invert MII power **/ + if (nic->is3c556) { + _set_window(nic, winAddressing2); + _outw(nic, regResetOptions_2_w, + _inw(nic, regResetOptions_2_w) | 0x4000); } -#endif - - /** Retrieve the Hardware address and print it on the screen. **/ - INF_3C90X.HWAddr[0] = eeprom[HWADDR_OFFSET + 0]>>8; - INF_3C90X.HWAddr[1] = eeprom[HWADDR_OFFSET + 0]&0xFF; - INF_3C90X.HWAddr[2] = eeprom[HWADDR_OFFSET + 1]>>8; - INF_3C90X.HWAddr[3] = eeprom[HWADDR_OFFSET + 1]&0xFF; - INF_3C90X.HWAddr[4] = eeprom[HWADDR_OFFSET + 2]>>8; - INF_3C90X.HWAddr[5] = eeprom[HWADDR_OFFSET + 2]&0xFF; - outputf("MAC Address = %!", INF_3C90X.HWAddr); - - /** 3C556: Invert MII power **/ - if (INF_3C90X.is3c556) { - unsigned int tmp; - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winAddressing2); - tmp = inw(INF_3C90X.IOAddr + regResetOptions_2_w); - tmp |= 0x4000; - outw(tmp, INF_3C90X.IOAddr + regResetOptions_2_w); - } - - /* Test if the link is good, if not continue */ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winDiagnostics4); - mstat = inw(INF_3C90X.IOAddr + regMediaStatus_4_w); - if((mstat & (1<<11)) == 0) { - outputf("Valid link not established"); - return 0; - } - - /** Program the MAC address into the station address registers **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winAddressing2); - outw(htons(eeprom[HWADDR_OFFSET + 0]), INF_3C90X.IOAddr + regStationAddress_2_3w); - outw(htons(eeprom[HWADDR_OFFSET + 1]), INF_3C90X.IOAddr + regStationAddress_2_3w+2); - outw(htons(eeprom[HWADDR_OFFSET + 2]), INF_3C90X.IOAddr + regStationAddress_2_3w+4); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2); - outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+4); - - /** Fill in our entry in the etherboot arp table **/ -/* XXX ? for lwip? - for(i=0;inode_addr[i] = (eeprom[HWADDR_OFFSET + i/2] >> (8*((i&1)^1))) & 0xff; -*/ - - /** Read the media options register, print a message and set default - ** xcvr. - ** - ** Uses Media Option command on B revision, Reset Option on non-B - ** revision cards -- same register address - **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); - mopt = inw(INF_3C90X.IOAddr + regResetMediaOptions_3_w); - /** mask out VCO bit that is defined as 10baseFL bit on B-rev cards **/ - if (! INF_3C90X.isBrev) - { - mopt &= 0x7F; + /* Test if the link is good; if not, bail out */ + _set_window(nic, winDiagnostics4); + mstat = _inw(nic, regMediaStatus_4_w); + if((mstat & (1<<11)) == 0) { + outputf("3c90x: valid link not established"); + return 0; } - outputf("Connectors present: "); - c = 0; - linktype = 0x0008; - if (mopt & 0x01) - { - outputf("%s100Base-T4",(c++)?", ":""); - linktype = 0x0006; - } - if (mopt & 0x04) - { - outputf("%s100Base-FX",(c++)?", ":""); - linktype = 0x0005; - } - if (mopt & 0x10) - { - outputf("%s10Base-2",(c++)?", ":""); - linktype = 0x0003; - } - if (mopt & 0x20) + /* Program the MAC address into the station address registers */ + _set_window(nic, winAddressing2); + _outw(nic, regStationAddress_2_3w, htons(eeprom[HWADDR_OFFSET + 0])); + _outw(nic, regStationAddress_2_3w+2, htons(eeprom[HWADDR_OFFSET + 1])); + _outw(nic, regStationAddress_2_3w+4, htons(eeprom[HWADDR_OFFSET + 2])); + _outw(nic, regStationMask_2_3w+0, 0); + _outw(nic, regStationMask_2_3w+2, 0); + _outw(nic, regStationMask_2_3w+4, 0); + + /** Read the media options register, print a message and set default + ** xcvr. + ** + ** Uses Media Option command on B revision, Reset Option on non-B + ** revision cards -- same register address + **/ + _set_window(nic, winTxRxOptions3); + mopt = _inw(nic, regResetMediaOptions_3_w); + + /** mask out VCO bit that is defined as 10baseFL bit on B-rev cards **/ + if (!nic->isBrev) + mopt &= 0x7F; + + outputf("3c90x: connectors present: "); + c = 0; + linktype = 0x0008; + if (mopt & 0x01) { - outputf("%sAUI",(c++)?", ":""); - linktype = 0x0001; + outputf(" 100Base-T4"); + linktype = 0x0006; } - if (mopt & 0x40) + if (mopt & 0x04) { - outputf("%sMII",(c++)?", ":""); - linktype = 0x0006; + outputf(" 100Base-FX"); + linktype = 0x0005; } - if ((mopt & 0xA) == 0xA) + if (mopt & 0x10) { - outputf("%s10Base-T / 100Base-TX",(c++)?", ":""); - linktype = 0x0008; + outputf(" 10Base-2"); + linktype = 0x0003; } - else if ((mopt & 0xA) == 0x2) + if (mopt & 0x20) { - outputf("%s100Base-TX",(c++)?", ":""); - linktype = 0x0008; + outputf(" AUI"); + linktype = 0x0001; } - else if ((mopt & 0xA) == 0x8) + if (mopt & 0x40) { - outputf("%s10Base-T",(c++)?", ":""); - linktype = 0x0008; + outputf(" MII"); + linktype = 0x0006; } - outputf("."); - - /** Determine transceiver type to use, depending on value stored in - ** eeprom 0x16 - **/ - if (INF_3C90X.isBrev) + if ((mopt & 0xA) == 0xA) { - if ((eeprom[0x16] & 0xFF00) == XCVR_MAGIC) - { - /** User-defined **/ - linktype = eeprom[0x16] & 0x000F; - } + outputf(" 10Base-T / 100Base-TX"); + linktype = 0x0008; + } else if ((mopt & 0xA) == 0x2) { + outputf(" 100Base-TX"); + linktype = 0x0008; + } else if ((mopt & 0xA) == 0x8) { + outputf(" 10Base-T"); + linktype = 0x0008; } - else - { -#ifdef CFG_3C90X_XCVR - if (CFG_3C90X_XCVR != 255) - linktype = CFG_3C90X_XCVR; -#endif /* CFG_3C90X_XCVR */ - /** I don't know what MII MAC only mode is!!! **/ - if (linktype == 0x0009) - { - if (INF_3C90X.isBrev) + /** Determine transceiver type to use, depending on value stored in + ** eeprom 0x16 + **/ + if (nic->isBrev && ((eeprom[0x16] & 0xFF00) == XCVR_MAGIC)) + linktype = eeprom[0x16] & 0x000F; /* User-defined */ + else if (linktype == 0x0009) { + if (nic->isBrev) outputf("WARNING: MII External MAC Mode only supported on B-revision " - "cards!!!!\nFalling Back to MII Mode\n"); + "cards!!!!\nFalling Back to MII Mode\n"); linktype = 0x0006; - } - } - - /** enable DC converter for 10-Base-T **/ - if (linktype == 0x0003) - { - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdEnableDcConverter, 0); } - /** Set the link to the type we just determined. **/ - a3c90x_internal_SetWindow(INF_3C90X.IOAddr, winTxRxOptions3); - cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l); - cfg &= ~(0xF<<20); - cfg |= (linktype<<20); - outl(cfg, INF_3C90X.IOAddr + regInternalConfig_3_l); - - /** Now that we set the xcvr type, reset the Tx and Rx, re-enable. **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxReset, 0x00); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) - ; - - if (!INF_3C90X.isBrev) - outb(0x01, INF_3C90X.IOAddr + regTxFreeThresh_b); - - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdTxEnable, 0); - - /** - ** reset of the receiver on B-revision cards re-negotiates the link - ** takes several seconds (a computer eternity) - **/ - if (INF_3C90X.isBrev) - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x04); - else - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxReset, 0x00); - while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) - ; - - /** Set the RX filter = receive only individual pkts & multicast & bcast. **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdSetRxFilter, 0x01 + 0x02 + 0x04); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdRxEnable, 0); - - - /** - ** set Indication and Interrupt flags , acknowledge any IRQ's - **/ - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, cmdSetInterruptEnable, 0); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdSetIndicationEnable, 0x0014); - a3c90x_internal_IssueCommand(INF_3C90X.IOAddr, - cmdAcknowledgeInterrupt, 0x661); - - /* * Set our exported functions **/ - nic->poll = a3c90x_poll; - nic->transmit = a3c90x_transmit; - - return 1; + /** enable DC converter for 10-Base-T **/ + if (linktype == 0x0003) + _issue_command(nic, cmdEnableDcConverter, 0); + + /** Set the link to the type we just determined. **/ + _set_window(nic, winTxRxOptions3); + cfg = _inl(nic, regInternalConfig_3_l); + cfg &= ~(0xF<<20); + cfg |= (linktype<<20); + _outl(nic, regInternalConfig_3_l, cfg); + + /* Reset and turn on the transmit engine. */ + _issue_command(nic, cmdTxReset, 0); + if (!nic->isBrev) + _outb(nic, regTxFreeThresh_b, 0x01); + _issue_command(nic, cmdTxEnable, 0); + + /* Reset and turn on the receive engine. */ + _issue_command(nic, cmdRxReset, nic->isBrev ? 0x04 : 0x00); + _issue_command(nic, cmdSetRxFilter, 0x01 + 0x02 + 0x04); /* Individual, multicast, broadcast */ + _recv_prepare(nic); /* Set up the ring buffer... */ + _issue_command(nic, cmdRxEnable, 0); /* ... and light it up. */ + + /* Turn on interrupts, and ack any that are hanging out. */ + _issue_command(nic, cmdSetInterruptEnable, 0); + _issue_command(nic, cmdSetIndicationEnable, 0x0014); + _issue_command(nic, cmdAcknowledgeInterrupt, 0x661); + + /* Register with lwIP. */ + nic->nic.recv = _recv; + nic->nic.transmit = _transmit; + eth_register(&(nic->nic)); + + return 1; } -static struct pci_id a3c90x_nics[] = { -/* Original 90x revisions: */ -PCI_ROM(0x10b7, 0x6055, "3c556", "3C556"), /* Huricane */ -PCI_ROM(0x10b7, 0x9000, "3c905-tpo", "3Com900-TPO"), /* 10 Base TPO */ -PCI_ROM(0x10b7, 0x9001, "3c905-t4", "3Com900-Combo"), /* 10/100 T4 */ -PCI_ROM(0x10b7, 0x9050, "3c905-tpo100", "3Com905-TX"), /* 100 Base TX / 10/100 TPO */ -PCI_ROM(0x10b7, 0x9051, "3c905-combo", "3Com905-T4"), /* 100 Base T4 / 10 Base Combo */ -/* Newer 90xB revisions: */ -PCI_ROM(0x10b7, 0x9004, "3c905b-tpo", "3Com900B-TPO"), /* 10 Base TPO */ -PCI_ROM(0x10b7, 0x9005, "3c905b-combo", "3Com900B-Combo"), /* 10 Base Combo */ -PCI_ROM(0x10b7, 0x9006, "3c905b-tpb2", "3Com900B-2/T"), /* 10 Base TP and Base2 */ -PCI_ROM(0x10b7, 0x900a, "3c905b-fl", "3Com900B-FL"), /* 10 Base FL */ -PCI_ROM(0x10b7, 0x9055, "3c905b-tpo100", "3Com905B-TX"), /* 10/100 TPO */ -PCI_ROM(0x10b7, 0x9056, "3c905b-t4", "3Com905B-T4"), /* 10/100 T4 */ -PCI_ROM(0x10b7, 0x9058, "3c905b-9058", "3Com905B-9058"), /* Cyclone 10/100/BNC */ -PCI_ROM(0x10b7, 0x905a, "3c905b-fx", "3Com905B-FL"), /* 100 Base FX / 10 Base FX */ -/* Newer 90xC revision: */ -PCI_ROM(0x10b7, 0x9200, "3c905c-tpo", "3Com905C-TXM"), /* 10/100 TPO (3C905C-TXM) */ -PCI_ROM(0x10b7, 0x9202, "3c920b-emb-ati", "3c920B-EMB-WNM (ATI Radeon 9100 IGP)"), /* 3c920B-EMB-WNM (ATI Radeon 9100 IGP) */ -PCI_ROM(0x10b7, 0x9210, "3c920b-emb-wnm","3Com20B-EMB WNM"), -PCI_ROM(0x10b7, 0x9800, "3c980", "3Com980-Cyclone"), /* Cyclone */ -PCI_ROM(0x10b7, 0x9805, "3c9805", "3Com9805"), /* Dual Port Server Cyclone */ -PCI_ROM(0x10b7, 0x7646, "3csoho100-tx", "3CSOHO100-TX"), /* Hurricane */ -PCI_ROM(0x10b7, 0x4500, "3c450", "3Com450 HomePNA Tornado"), -PCI_ROM(0x10b7, 0x1201, "3c982a", "3Com982A"), -PCI_ROM(0x10b7, 0x1202, "3c982b", "3Com982B"), +static struct pci_id _pci_ids[] = { + /* Original 90x revisions: */ + PCI_ROM(0x10b7, 0x6055, "3c556", "3C556"), /* Huricane */ + PCI_ROM(0x10b7, 0x9000, "3c905-tpo", "3Com900-TPO"), /* 10 Base TPO */ + PCI_ROM(0x10b7, 0x9001, "3c905-t4", "3Com900-Combo"), /* 10/100 T4 */ + PCI_ROM(0x10b7, 0x9050, "3c905-tpo100", "3Com905-TX"), /* 100 Base TX / 10/100 TPO */ + PCI_ROM(0x10b7, 0x9051, "3c905-combo", "3Com905-T4"), /* 100 Base T4 / 10 Base Combo */ + /* Newer 90xB revisions: */ + PCI_ROM(0x10b7, 0x9004, "3c905b-tpo", "3Com900B-TPO"), /* 10 Base TPO */ + PCI_ROM(0x10b7, 0x9005, "3c905b-combo", "3Com900B-Combo"), /* 10 Base Combo */ + PCI_ROM(0x10b7, 0x9006, "3c905b-tpb2", "3Com900B-2/T"), /* 10 Base TP and Base2 */ + PCI_ROM(0x10b7, 0x900a, "3c905b-fl", "3Com900B-FL"), /* 10 Base FL */ + PCI_ROM(0x10b7, 0x9055, "3c905b-tpo100", "3Com905B-TX"), /* 10/100 TPO */ + PCI_ROM(0x10b7, 0x9056, "3c905b-t4", "3Com905B-T4"), /* 10/100 T4 */ + PCI_ROM(0x10b7, 0x9058, "3c905b-9058", "3Com905B-9058"), /* Cyclone 10/100/BNC */ + PCI_ROM(0x10b7, 0x905a, "3c905b-fx", "3Com905B-FL"), /* 100 Base FX / 10 Base FX */ + /* Newer 90xC revision: */ + PCI_ROM(0x10b7, 0x9200, "3c905c-tpo", "3Com905C-TXM"), /* 10/100 TPO (3C905C-TXM) */ + PCI_ROM(0x10b7, 0x9202, "3c920b-emb-ati", "3c920B-EMB-WNM (ATI Radeon 9100 IGP)"), /* 3c920B-EMB-WNM (ATI Radeon 9100 IGP) */ + PCI_ROM(0x10b7, 0x9210, "3c920b-emb-wnm","3Com20B-EMB WNM"), + PCI_ROM(0x10b7, 0x9800, "3c980", "3Com980-Cyclone"), /* Cyclone */ + PCI_ROM(0x10b7, 0x9805, "3c9805", "3Com9805"), /* Dual Port Server Cyclone */ + PCI_ROM(0x10b7, 0x7646, "3csoho100-tx", "3CSOHO100-TX"), /* Hurricane */ + PCI_ROM(0x10b7, 0x4500, "3c450", "3Com450 HomePNA Tornado"), + PCI_ROM(0x10b7, 0x1201, "3c982a", "3Com982A"), + PCI_ROM(0x10b7, 0x1202, "3c982b", "3Com982B"), }; struct pci_driver a3c90x_driver = { - .name = "3C90X", - .probe = a3c90x_probe, - .ids = a3c90x_nics, - .id_count = sizeof(a3c90x_nics)/sizeof(a3c90x_nics[0]), + .name = "3c90x", + .probe = _probe, + .ids = _pci_ids, + .id_count = sizeof(_pci_ids)/sizeof(_pci_ids[0]), };