From 9032b2b5f7475dc07709aa2e51f9a014f76760c0 Mon Sep 17 00:00:00 2001 From: Joshua Wise Date: Mon, 17 Mar 2008 18:32:28 -0400 Subject: [PATCH] Optimization baseline, 77.788MHz, 4894 Slices, 1849 slice FFs, 9078 LUTs --- Main.v | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Main.v b/Main.v index 673b31c..42e614a 100644 --- a/Main.v +++ b/Main.v @@ -113,6 +113,7 @@ module MandelUnit( output reg [7:0] obail, ocuriter); wire [14:0] r2, i2, ri, diff; + wire [15:0] twocdiff; wire r2sign, i2sign, risign, dsign; wire [16:0] bigsum; wire bigsum_ovf, rin_ovf, iin_ovf, throwaway; @@ -132,8 +133,9 @@ module MandelUnit( assign bigsum_ovf = bigsum[16] | bigsum[15] | bigsum[14]; assign rin_ovf = rd; assign iin_ovf = id; - assign diff = (r2 > i2) ? r2 - i2 : i2 - r2; - assign dsign = (r2 > i2) ? 0 : 1; + assign twocdiff = r2 - i2; + assign diff = twocdiff[15] ? -twocdiff : twocdiff; + assign dsign = twocdiff[15]; always @ (posedge clk) begin -- 2.43.0