From: Joshua Wise Date: Tue, 18 Mar 2008 04:07:45 +0000 (-0400) Subject: Potentially fixed triplepump: 75.028MHz, 4596 slices, 8537 LUTs, 1805 ffs X-Git-Tag: PRE_ROLLBACK~12 X-Git-Url: http://git.joshuawise.com/mandelfpga.git/commitdiff_plain/3068fa611c7bfac974131f874165b002b5f20607 Potentially fixed triplepump: 75.028MHz, 4596 slices, 8537 LUTs, 1805 ffs --- diff --git a/Main.v b/Main.v index 61cb8f1..11d7833 100644 --- a/Main.v +++ b/Main.v @@ -230,11 +230,6 @@ module Mandelbrot( reg [2:0] state = 3'b001; // One-hot encoded state. - // On pixclk = 1, - // A new value to be loaded comes in, and a value in need of loopback comes out. - // On pixclk = 0, - // A new value in need of loopback comes in, and a completed value comes out. - assign initx = state[0] ? rx : state[1] ? stagex[1] : stagex[2]; @@ -263,8 +258,8 @@ module Mandelbrot( state[1] ? stageb[1] : stageb[2]; assign initci = state[0] ? 8'b00000000 : - state[1] ? stageb[1] : - stageb[2]; + state[1] ? stageci[1] : + stageci[2]; reg [7:0] out; reg typethea = 0; // Whether we have typed the A. @@ -286,11 +281,11 @@ module Mandelbrot( if (state[0]) begin {red, green, blue} <= {out[0],out[3],out[6],out[1],out[4],out[7],out[2],out[5]}; end - if (state[2]) begin + if (state[1]) begin out <= ~mb[`MAXOUTN] + colorofs; end - if (state[1]) begin // PnR0 in, PnR2 out + if (state[0]) begin // PnR0 in, PnR2 out stagex[2] <= xprop[`MAXOUTN]; stagey[2] <= yprop[`MAXOUTN]; stager[2] <= mr[`MAXOUTN]; @@ -303,7 +298,7 @@ module Mandelbrot( stageci[2] <= curiter[`MAXOUTN]; end - if (state[0]) begin // PnR2 in, PnR1 out + if (state[2]) begin // PnR2 in, PnR1 out stagex[1] <= xprop[`MAXOUTN]; stagey[1] <= yprop[`MAXOUTN]; stager[1] <= mr[`MAXOUTN];