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Add support for Verilator
authorJoshua Wise <joshua@rebirth.joshuawise.com>
Thu, 19 Jun 2008 03:29:20 +0000 (23:29 -0400)
committerJoshua Wise <joshua@rebirth.joshuawise.com>
Thu, 19 Jun 2008 03:29:20 +0000 (23:29 -0400)

No differences found
Pipelined realtime renderer of the Mandelbrot set on a Xilinx FPGA
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