X-Git-Url: http://git.joshuawise.com/mandelfpga.git/blobdiff_plain/2afeab21dbcfb1b0e2bcfadc146d061347d2c94e..e03ccef9a0b8b9f76b0211b5b5063f49ed9df23e:/Main.v?ds=sidebyside diff --git a/Main.v b/Main.v index ccc11c7..6762c0f 100644 --- a/Main.v +++ b/Main.v @@ -114,11 +114,12 @@ module MandelUnit( output reg rsout, isout, output reg [7:0] obail, ocuriter); - wire [14:0] r2, i2, ri, diff; + wire [13:0] r2, i2; + wire [14:0] ri, diff; wire [15:0] twocdiff; wire r2sign, i2sign, risign, dsign; - wire [15:0] bigsum; - wire bigsum_ovf, rin_ovf, iin_ovf, throwaway; + wire [13:0] bigsum; + wire bigsum_ovf; reg [12:0] xd, yd; reg ineedbaild; @@ -131,8 +132,8 @@ module MandelUnit( Multiplier i2m(clk, i[12:0], i[12:0], isign, isign, i2[12:0], i2sign, i2[13]); Multiplier rim(clk, r[12:0], i[12:0], rsign, isign, ri[13:1], risign, ri[14]); - assign bigsum = r2 + i2; - assign bigsum_ovf = bigsum[15] | bigsum[14]; + assign bigsum = r2[12:0] + i2[12:0]; + assign bigsum_ovf = bigsum[13] | r2[13] | i2[13]; assign twocdiff = r2 - i2; assign diff = twocdiff[15] ? -twocdiff : twocdiff; @@ -333,41 +334,23 @@ module Mandelbrot( xprop[0], yprop[0], xsprop[0], ysprop[0], mr[0], mi[0], mrs[0], mis[0], mb[0], curiter[0]); + +`define MAKE_UNIT(name, num) \ + MandelUnit name(mclk, \ + xprop[(num)], yprop[(num)], xsprop[(num)], ysprop[(num)], mr[(num)], mi[(num)], mrs[(num)], mis[(num)], mb[(num)], curiter[(num)], \ + xprop[(num)+1], yprop[(num)+1], xsprop[(num)+1], ysprop[(num)+1], mr[(num)+1], mi[(num)+1], mrs[(num)+1], mis[(num)+1], mb[(num)+1], curiter[(num)+1]) - MandelUnit mu1(mclk, - xprop[0], yprop[0], xsprop[0], ysprop[0], mr[0], mi[0], mrs[0], mis[0], mb[0], curiter[0], - xprop[1], yprop[1], xsprop[1], ysprop[1], mr[1], mi[1], mrs[1], mis[1], mb[1], curiter[1]); - MandelUnit mu2(mclk, - xprop[1], yprop[1], xsprop[1], ysprop[1], mr[1], mi[1], mrs[1], mis[1], mb[1], curiter[1], - xprop[2], yprop[2], xsprop[2], ysprop[2], mr[2], mi[2], mrs[2], mis[2], mb[2], curiter[2]); - MandelUnit mu3(mclk, - xprop[2], yprop[2], xsprop[2], ysprop[2], mr[2], mi[2], mrs[2], mis[2], mb[2], curiter[2], - xprop[3], yprop[3], xsprop[3], ysprop[3], mr[3], mi[3], mrs[3], mis[3], mb[3], curiter[3]); - MandelUnit mu4(mclk, - xprop[3], yprop[3], xsprop[3], ysprop[3], mr[3], mi[3], mrs[3], mis[3], mb[3], curiter[3], - xprop[4], yprop[4], xsprop[4], ysprop[4], mr[4], mi[4], mrs[4], mis[4], mb[4], curiter[4]); - MandelUnit mu5(mclk, - xprop[4], yprop[4], xsprop[4], ysprop[4], mr[4], mi[4], mrs[4], mis[4], mb[4], curiter[4], - xprop[5], yprop[5], xsprop[5], ysprop[5], mr[5], mi[5], mrs[5], mis[5], mb[5], curiter[5]); - MandelUnit mu6(mclk, - xprop[5], yprop[5], xsprop[5], ysprop[5], mr[5], mi[5], mrs[5], mis[5], mb[5], curiter[5], - xprop[6], yprop[6], xsprop[6], ysprop[6], mr[6], mi[6], mrs[6], mis[6], mb[6], curiter[6]); - MandelUnit mu7(mclk, - xprop[6], yprop[6], xsprop[6], ysprop[6], mr[6], mi[6], mrs[6], mis[6], mb[6], curiter[6], - xprop[7], yprop[7], xsprop[7], ysprop[7], mr[7], mi[7], mrs[7], mis[7], mb[7], curiter[7]); - MandelUnit mu8(mclk, - xprop[7], yprop[7], xsprop[7], ysprop[7], mr[7], mi[7], mrs[7], mis[7], mb[7], curiter[7], - xprop[8], yprop[8], xsprop[8], ysprop[8], mr[8], mi[8], mrs[8], mis[8], mb[8], curiter[8]); - MandelUnit mu9(mclk, - xprop[8], yprop[8], xsprop[8], ysprop[8], mr[8], mi[8], mrs[8], mis[8], mb[8], curiter[8], - xprop[9], yprop[9], xsprop[9], ysprop[9], mr[9], mi[9], mrs[9], mis[9], mb[9], curiter[9]); - MandelUnit mua(mclk, - xprop[9], yprop[9], xsprop[9], ysprop[9], mr[9], mi[9], mrs[9], mis[9], mb[9], curiter[9], - xprop[10], yprop[10], xsprop[10], ysprop[10], mr[10], mi[10], mrs[10], mis[10], mb[10], curiter[10]); - MandelUnit mub(mclk, - xprop[10], yprop[10], xsprop[10], ysprop[10], mr[10], mi[10], mrs[10], mis[10], mb[10], curiter[10], - xprop[11], yprop[11], xsprop[11], ysprop[11], mr[11], mi[11], mrs[11], mis[11], mb[11], curiter[11]); - + `MAKE_UNIT(mu1, 0); + `MAKE_UNIT(mu2, 1); + `MAKE_UNIT(mu3, 2); + `MAKE_UNIT(mu4, 3); + `MAKE_UNIT(mu5, 4); + `MAKE_UNIT(mu6, 5); + `MAKE_UNIT(mu7, 6); + `MAKE_UNIT(mu8, 7); + `MAKE_UNIT(mu9, 8); + `MAKE_UNIT(mua, 9); + `MAKE_UNIT(mub, 10); endmodule module Logo( @@ -396,12 +379,11 @@ module MandelTop( input left, right, up, down, rst, cycle, logooff, input [2:0] scale); - wire pixclk, mclk, gclk2, clk; wire dcm1ok, dcm2ok; assign dcmok = dcm1ok && dcm2ok; - IBUFG typeA(.O(clk), .I(gclk)); + IBUFG iclkbuf(.O(clk), .I(gclk)); pixDCM dcm( // CLKIN is 50MHz xtal, CLKFX_OUT is 25MHz .CLKIN_IN(clk),