From b057a5d6e6db6db06ae33703ca72cd235eec91d6 Mon Sep 17 00:00:00 2001 From: Joshua Wise Date: Sat, 10 May 2008 03:16:48 -0400 Subject: [PATCH 1/1] Move the core to core/ --- CoreTop.prj | 2 +- Makefile | 21 +++++++++------- PS2Button.v | 25 +++++++++++++++++-- System.v | 1 + GBZ80Core.v => core/GBZ80Core.v | 0 allinsns.v => core/allinsns.v | 0 insn_add_hl.v => core/insn_add_hl.v | 0 insn_alu8.v => core/insn_alu8.v | 0 insn_alu_a.v => core/insn_alu_a.v | 0 insn_alu_ext.v => core/insn_alu_ext.v | 0 insn_bit.v => core/insn_bit.v | 0 insn_call-callcc.v => core/insn_call-callcc.v | 0 insn_di-ei.v => core/insn_di-ei.v | 0 insn_halt.v => core/insn_halt.v | 0 insn_incdec16.v => core/insn_incdec16.v | 0 insn_incdec_hl.v => core/insn_incdec_hl.v | 0 insn_incdec_reg8.v => core/insn_incdec_reg8.v | 0 insn_jp-jpcc.v => core/insn_jp-jpcc.v | 0 insn_jp_hl.v => core/insn_jp_hl.v | 0 insn_jr-jrcc.v => core/insn_jr-jrcc.v | 0 insn_ld_hl_reg.v => core/insn_ld_hl_reg.v | 0 insn_ld_reg_hl.v => core/insn_ld_reg_hl.v | 0 .../insn_ld_reg_imm16.v | 0 insn_ld_reg_imm8.v => core/insn_ld_reg_imm8.v | 0 insn_ld_reg_reg.v => core/insn_ld_reg_reg.v | 0 insn_ld_sp_hl.v => core/insn_ld_sp_hl.v | 0 insn_ldbcde_a.v => core/insn_ldbcde_a.v | 0 insn_ldh_ac.v => core/insn_ldh_ac.v | 0 insn_ldm16_a.v => core/insn_ldm16_a.v | 0 insn_ldm8_a.v => core/insn_ldm8_a.v | 0 insn_ldx_ahl.v => core/insn_ldx_ahl.v | 0 insn_nop.v => core/insn_nop.v | 0 insn_pop_reg.v => core/insn_pop_reg.v | 0 insn_push_reg.v => core/insn_push_reg.v | 0 insn_ret-retcc.v => core/insn_ret-retcc.v | 0 insn_rst.v => core/insn_rst.v | 0 core/insn_two_byte.v | 11 ++++++++ insn_vop_intr.v => core/insn_vop_intr.v | 0 38 files changed, 48 insertions(+), 12 deletions(-) rename GBZ80Core.v => core/GBZ80Core.v (100%) rename allinsns.v => core/allinsns.v (100%) rename insn_add_hl.v => core/insn_add_hl.v (100%) rename insn_alu8.v => core/insn_alu8.v (100%) rename insn_alu_a.v => core/insn_alu_a.v (100%) rename insn_alu_ext.v => core/insn_alu_ext.v (100%) rename insn_bit.v => core/insn_bit.v (100%) rename insn_call-callcc.v => core/insn_call-callcc.v (100%) rename insn_di-ei.v => core/insn_di-ei.v (100%) rename insn_halt.v => core/insn_halt.v (100%) rename insn_incdec16.v => core/insn_incdec16.v (100%) rename insn_incdec_hl.v => core/insn_incdec_hl.v (100%) rename insn_incdec_reg8.v => core/insn_incdec_reg8.v (100%) rename insn_jp-jpcc.v => core/insn_jp-jpcc.v (100%) rename insn_jp_hl.v => core/insn_jp_hl.v (100%) rename insn_jr-jrcc.v => core/insn_jr-jrcc.v (100%) rename insn_ld_hl_reg.v => core/insn_ld_hl_reg.v (100%) rename insn_ld_reg_hl.v => core/insn_ld_reg_hl.v (100%) rename insn_ld_reg_imm16.v => core/insn_ld_reg_imm16.v (100%) rename insn_ld_reg_imm8.v => core/insn_ld_reg_imm8.v (100%) rename insn_ld_reg_reg.v => core/insn_ld_reg_reg.v (100%) rename insn_ld_sp_hl.v => core/insn_ld_sp_hl.v (100%) rename insn_ldbcde_a.v => core/insn_ldbcde_a.v (100%) rename insn_ldh_ac.v => core/insn_ldh_ac.v (100%) rename insn_ldm16_a.v => core/insn_ldm16_a.v (100%) rename insn_ldm8_a.v => core/insn_ldm8_a.v (100%) rename insn_ldx_ahl.v => core/insn_ldx_ahl.v (100%) rename insn_nop.v => core/insn_nop.v (100%) rename insn_pop_reg.v => core/insn_pop_reg.v (100%) rename insn_push_reg.v => core/insn_push_reg.v (100%) rename insn_ret-retcc.v => core/insn_ret-retcc.v (100%) rename insn_rst.v => core/insn_rst.v (100%) create mode 100644 core/insn_two_byte.v rename insn_vop_intr.v => core/insn_vop_intr.v (100%) diff --git a/CoreTop.prj b/CoreTop.prj index 4f1c839..c28c727 100644 --- a/CoreTop.prj +++ b/CoreTop.prj @@ -1,7 +1,7 @@ verilog work "Uart.v" verilog work "Timer.v" verilog work "Interrupt.v" -verilog work "GBZ80Core.v" +verilog work "core/GBZ80Core.v" verilog work "CPUDCM.v" verilog work "7seg.v" verilog work "System.v" diff --git a/Makefile b/Makefile index 15107c3..40d5efa 100644 --- a/Makefile +++ b/Makefile @@ -1,14 +1,17 @@ -VLOGS = 7seg.v Framebuffer.v GBZ80Core.v Interrupt.v LCDC.v Sound1.v \ +VLOGS = 7seg.v Framebuffer.v core/GBZ80Core.v Interrupt.v LCDC.v Sound1.v \ Sound2.v Soundcore.v System.v Timer.v Uart.v Buttons.v PS2Button.v -VLOGS_ALL = $(VLOGS) insn_call-callcc.v insn_incdec16.v insn_jr-jrcc.v \ - insn_ld_reg_hl.v insn_ld_reg_reg.v insn_nop.v insn_ret-retcc.v \ - allinsns.v insn_alu8.v insn_di-ei.v insn_jp_hl.v insn_ldh_ac.v \ - insn_ld_reg_imm16.v insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v \ - CPUDCM.v insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \ - insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \ - insn_ldm8_a.v insn_ldm16_a.v insn_ldbcde_a.v insn_alu_ext.v \ - insn_bit.v insn_two_byte.v insn_incdec_reg8.v insn_add_hl.v +VLOGS_ALL = $(VLOGS) core/insn_call-callcc.v core/insn_incdec16.v \ + core/insn_jr-jrcc.v core/insn_ld_reg_hl.v core/insn_ld_reg_reg.v \ + core/insn_nop.v core/insn_ret-retcc.v core/allinsns.v \ + core/insn_alu8.v core/insn_di-ei.v core/insn_jp_hl.v \ + core/insn_ldh_ac.v core/insn_ld_reg_imm16.v core/insn_ld_sp_hl.v \ + core/insn_pop_reg.v core/insn_rst.v CPUDCM.v core/insn_alu_a.v \ + core/insn_halt.v core/insn_jp-jpcc.v core/insn_ld_hl_reg.v \ + core/insn_ld_reg_imm8.v core/insn_ldx_ahl.v core/insn_push_reg.v \ + core/insn_vop_intr.v core/insn_ldm8_a.v core/insn_ldm16_a.v \ + core/insn_ldbcde_a.v core/insn_alu_ext.v core/insn_bit.v \ + core/insn_two_byte.v core/insn_incdec_reg8.v core/insn_add_hl.v all: CoreTop.svf diff --git a/PS2Button.v b/PS2Button.v index 169346c..81a0e89 100644 --- a/PS2Button.v +++ b/PS2Button.v @@ -1,4 +1,5 @@ module PS2Button( + input clk, input inclk, input indata, output wire [7:0] buttons @@ -10,9 +11,29 @@ module PS2Button( reg key_a = 0,key_b = 0,key_st = 0,key_sel = 0,key_up = 0,key_dn = 0,key_l = 0,key_r = 0; assign buttons = {key_st,key_sel,key_b,key_a,key_dn,key_up,key_l,key_r}; + + /* Clock debouncing */ + reg lastinclk = 0; + reg [5:0] debounce = 0; + reg fixedclk = 0; + reg [9:0] resetcountdown = 0; + + always @(posedge clk) begin + if (inclk != lastinclk) begin + lastinclk <= inclk; + debounce <= 1; + resetcountdown <= 10'b1111111111; + end else if (debounce == 0) begin + fixedclk <= inclk; + resetcountdown <= resetcountdown - 1; + end else + debounce <= debounce + 1; + end - always @ (negedge inclk) begin - if(bitcount == 10) begin + always @(negedge fixedclk) begin + if (resetcountdown == 0) + bitcount <= 0; + else if (bitcount == 10) begin bitcount <= 0; if(parity != (^ key)) begin if(keyarrow) begin diff --git a/System.v b/System.v index 68de591..37ca872 100644 --- a/System.v +++ b/System.v @@ -369,6 +369,7 @@ module CoreTop( `ifdef isim `else PS2Button ps2( + .clk(clk), .inclk(ps2c), .indata(ps2d), .buttons(ps2buttons) diff --git a/GBZ80Core.v b/core/GBZ80Core.v similarity index 100% rename from GBZ80Core.v rename to core/GBZ80Core.v diff --git a/allinsns.v b/core/allinsns.v similarity index 100% rename from allinsns.v rename to core/allinsns.v diff --git a/insn_add_hl.v b/core/insn_add_hl.v similarity index 100% rename from insn_add_hl.v rename to core/insn_add_hl.v diff --git a/insn_alu8.v b/core/insn_alu8.v similarity index 100% rename from insn_alu8.v rename to core/insn_alu8.v diff --git a/insn_alu_a.v b/core/insn_alu_a.v similarity index 100% rename from insn_alu_a.v rename to core/insn_alu_a.v diff --git a/insn_alu_ext.v b/core/insn_alu_ext.v similarity index 100% rename from insn_alu_ext.v rename to core/insn_alu_ext.v diff --git a/insn_bit.v b/core/insn_bit.v similarity index 100% rename from insn_bit.v rename to core/insn_bit.v diff --git a/insn_call-callcc.v b/core/insn_call-callcc.v similarity index 100% rename from insn_call-callcc.v rename to core/insn_call-callcc.v diff --git a/insn_di-ei.v b/core/insn_di-ei.v similarity index 100% rename from insn_di-ei.v rename to core/insn_di-ei.v diff --git a/insn_halt.v b/core/insn_halt.v similarity index 100% rename from insn_halt.v rename to core/insn_halt.v diff --git a/insn_incdec16.v b/core/insn_incdec16.v similarity index 100% rename from insn_incdec16.v rename to core/insn_incdec16.v diff --git a/insn_incdec_hl.v b/core/insn_incdec_hl.v similarity index 100% rename from insn_incdec_hl.v rename to core/insn_incdec_hl.v diff --git a/insn_incdec_reg8.v b/core/insn_incdec_reg8.v similarity index 100% rename from insn_incdec_reg8.v rename to core/insn_incdec_reg8.v diff --git a/insn_jp-jpcc.v b/core/insn_jp-jpcc.v similarity index 100% rename from insn_jp-jpcc.v rename to core/insn_jp-jpcc.v diff --git a/insn_jp_hl.v b/core/insn_jp_hl.v similarity index 100% rename from insn_jp_hl.v rename to core/insn_jp_hl.v diff --git a/insn_jr-jrcc.v b/core/insn_jr-jrcc.v similarity index 100% rename from insn_jr-jrcc.v rename to core/insn_jr-jrcc.v diff --git a/insn_ld_hl_reg.v b/core/insn_ld_hl_reg.v similarity index 100% rename from insn_ld_hl_reg.v rename to core/insn_ld_hl_reg.v diff --git a/insn_ld_reg_hl.v b/core/insn_ld_reg_hl.v similarity index 100% rename from insn_ld_reg_hl.v rename to core/insn_ld_reg_hl.v diff --git a/insn_ld_reg_imm16.v b/core/insn_ld_reg_imm16.v similarity index 100% rename from insn_ld_reg_imm16.v rename to core/insn_ld_reg_imm16.v diff --git a/insn_ld_reg_imm8.v b/core/insn_ld_reg_imm8.v similarity index 100% rename from insn_ld_reg_imm8.v rename to core/insn_ld_reg_imm8.v diff --git a/insn_ld_reg_reg.v b/core/insn_ld_reg_reg.v similarity index 100% rename from insn_ld_reg_reg.v rename to core/insn_ld_reg_reg.v diff --git a/insn_ld_sp_hl.v b/core/insn_ld_sp_hl.v similarity index 100% rename from insn_ld_sp_hl.v rename to core/insn_ld_sp_hl.v diff --git a/insn_ldbcde_a.v b/core/insn_ldbcde_a.v similarity index 100% rename from insn_ldbcde_a.v rename to core/insn_ldbcde_a.v diff --git a/insn_ldh_ac.v b/core/insn_ldh_ac.v similarity index 100% rename from insn_ldh_ac.v rename to core/insn_ldh_ac.v diff --git a/insn_ldm16_a.v b/core/insn_ldm16_a.v similarity index 100% rename from insn_ldm16_a.v rename to core/insn_ldm16_a.v diff --git a/insn_ldm8_a.v b/core/insn_ldm8_a.v similarity index 100% rename from insn_ldm8_a.v rename to core/insn_ldm8_a.v diff --git a/insn_ldx_ahl.v b/core/insn_ldx_ahl.v similarity index 100% rename from insn_ldx_ahl.v rename to core/insn_ldx_ahl.v diff --git a/insn_nop.v b/core/insn_nop.v similarity index 100% rename from insn_nop.v rename to core/insn_nop.v diff --git a/insn_pop_reg.v b/core/insn_pop_reg.v similarity index 100% rename from insn_pop_reg.v rename to core/insn_pop_reg.v diff --git a/insn_push_reg.v b/core/insn_push_reg.v similarity index 100% rename from insn_push_reg.v rename to core/insn_push_reg.v diff --git a/insn_ret-retcc.v b/core/insn_ret-retcc.v similarity index 100% rename from insn_ret-retcc.v rename to core/insn_ret-retcc.v diff --git a/insn_rst.v b/core/insn_rst.v similarity index 100% rename from insn_rst.v rename to core/insn_rst.v diff --git a/core/insn_two_byte.v b/core/insn_two_byte.v new file mode 100644 index 0000000..78cd7c7 --- /dev/null +++ b/core/insn_two_byte.v @@ -0,0 +1,11 @@ +`ifdef EXECUTE + `INSN_TWO_BYTE: begin + `EXEC_INC_PC + `EXEC_NEWCYCLE_TWOBYTE + end +`endif + +`ifdef WRITEBACK + `INSN_TWO_BYTE: begin + end +`endif diff --git a/insn_vop_intr.v b/core/insn_vop_intr.v similarity index 100% rename from insn_vop_intr.v rename to core/insn_vop_intr.v -- 2.43.0