From 80ecd2fe23cfab4f410f8f760dea4b44d72a82c9 Mon Sep 17 00:00:00 2001
From: Joshua Wise <joshua@nyus.joshuawise.com>
Date: Sat, 19 Apr 2008 01:09:56 -0400
Subject: [PATCH 1/1] It typechecks! Ship it!

---
 LCDC.v   | 12 ++++-----
 diag.asm | 76 +++++++++++++++++++++++++++++++++++++++++++++-----------
 2 files changed, 68 insertions(+), 20 deletions(-)

diff --git a/LCDC.v b/LCDC.v
index 9a111f7..9cebfd7 100644
--- a/LCDC.v
+++ b/LCDC.v
@@ -63,8 +63,8 @@ module LCDC(
 	reg [8:0] posx = 9'h000;
 	reg [7:0] posy = 8'h00;
 	
-	wire vraminuse = (posx < 163);
-	wire oaminuse = (posx > 369);
+	wire vraminuse = (posx < 163) && (posy < 144);
+	wire oaminuse = (posx > 369) && (posy < 144);
 	
 	wire display = (posx > 2) && (posx < 163) && (posy < 144);
 	
@@ -81,7 +81,7 @@ module LCDC(
 	assign lcdhs = (posx == 455);
 	assign lcdr = display ? {pixdata[1] ? 3'b111 : 3'b000} : 3'b000;
 	assign lcdg = display ? {pixdata[0] ? 3'b111 : 3'b000} : 3'b000;
-	assign lcdb = display ? {(vypos < 8) ? 2'b11 : 2'b00} : 2'b00;
+	assign lcdb = display ? {(vypos < 8 || vxpos < 8) ? 2'b11 : 2'b00} : 2'b00;
 	
 	reg mode00irq = 0, mode01irq = 0, mode10irq = 0, lycirq = 0;
 	assign lcdcirq = (rSTAT[3] & mode00irq) | (rSTAT[4] & mode01irq) | (rSTAT[5] & mode10irq) | (rSTAT[6] & lycirq);
@@ -150,7 +150,7 @@ module LCDC(
 	always @(negedge clk)
 		if ((vraminuse && ((posx == 1) || ((posx > 2) && (vxpos[2:0] == 3'b110)))) || decode_bgmap1) begin
 			tileno <= bgmap1[bgmapaddr_in];
-			if (wr && decode_bgmap1)
+			if (wr && decode_bgmap1 && ~vraminuse)
 				bgmap1[bgmapaddr_in] <= data;
 		end
 	
@@ -158,9 +158,9 @@ module LCDC(
 		if ((vraminuse && ((posx == 2) || ((posx > 2) && (vxpos[2:0] == 3'b111)))) || decode_tiledata) begin
 			tilehigh <= tiledatahigh[tileaddr_in];
 			tilelow <= tiledatalow[tileaddr_in];
-			if (wr && addr[0] && decode_tiledata)
+			if (wr && addr[0] && decode_tiledata && ~vraminuse)
 				tiledatahigh[tileaddr_in] <= data;
-			if (wr && ~addr[0] && decode_tiledata)
+			if (wr && ~addr[0] && decode_tiledata && ~vraminuse)
 				tiledatalow[tileaddr_in] <= data;
 		end
   
diff --git a/diag.asm b/diag.asm
index 2c843eb..50cefe7 100644
--- a/diag.asm
+++ b/diag.asm
@@ -52,11 +52,7 @@ signon:
 
 putscreen:
 	; Wait for vblank
-.stat:	ld a, [$FF41]
-	ld [$FF51], a
-	and $03		; mode
-	cp $01		; VBLANK
-	jr nz, .stat
+	call .vblwait
 
 	ld hl, $8000	; Copy two tiles.
 	ld a, $AA
@@ -102,13 +98,30 @@ putscreen:
 	ld [hli], a
 	
 	ld hl, $9800
+.vloop:	call .vblwait
+	ld c, $40
 .loop:	ld a, $01
 	ld [hli], a
 	xor a
 	ld [hli], a
 	ld a, h
 	cp $9C
-	jp nz,.loop
+	ret z
+	dec c
+	xor a
+	cp c
+	jr nz,.loop
+	jr .vloop
+
+.vblwait:
+.stat1:	ld a, [$FF41]	; STAT
+	and $03
+	cp $00
+	jp nz, .stat1
+.stat2:	ld a, [$FF41]
+	and $03
+	cp $01
+	jr nz, .stat2
 	ret
 
 vbl:
@@ -120,16 +133,34 @@ vbl:
 	xor a
 	ld [$FF0F], a
 
-	ld c, $42	; SCY
-	ld a, [c]
-	inc a
-	ld [c], a
+	ld a, [$FF51]
+	ld b, a
+	and $80
+	cp $80
+	jr nz, .nothing
+	ld c, $0
+
+	ld a, b
+	and $1
+	cp c
+	call nz, .scyup
 	
-	ld c, $43	; SCX
-	ld a, [c]
-	inc a
-	ld [c], a
+	ld a, b
+	and $2
+	cp c
+	call nz, .scydown
+	
+	ld a, b
+	and $4
+	cp c
+	call nz, .scxup
+	
+	ld a, b
+	and $8
+	cp c
+	call nz, .scxdown
 
+.nothing:
 	POP HL
 	POP DE
 	POP BC
@@ -137,6 +168,23 @@ vbl:
 
 	RETI
 
+.scyup:	ld hl, $FF42
+	inc [hl]
+	ret
+
+.scydown:	ld hl, $FF42
+	dec [hl]
+	ret
+
+.scxup:	ld hl, $FF43
+	inc [hl]
+	ret
+
+.scxdown:	ld hl, $FF43
+	dec [hl]
+	ret	
+	
+
 lcdc:
 	PUSH AF
 	PUSH BC
-- 
2.43.0