From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Mon, 7 Apr 2008 02:57:28 +0000 (-0400)
Subject: Wire switches back up and remove cclk.
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/fc443a4f61b38236a17ab2928bd90327edc68266?ds=inline;hp=30ef1ae0e1d60f55aee401ad9741cb8d5a0feef0

Wire switches back up and remove cclk.
---

diff --git a/System.v b/System.v
index 00ee4ec..5b0fb3c 100644
--- a/System.v
+++ b/System.v
@@ -72,10 +72,6 @@ module CoreTop(
 	wire clk;	
 	CPUDCM dcm (.CLKIN_IN(xtal), .CLKFX_OUT(clk));
 	
-	wire cclk;
-//	IBUFG ibuf (.O(cclk), .I(switches[0] & clk));
-	assign cclk = clk;
-
 	wire [15:0] addr;	
 	wire [7:0] data;
 	wire wr, rd;
@@ -120,7 +116,7 @@ module CoreTop(
 		.wr(wr),
 		.rd(rd),
 		.ledout(leds),
-		.switches({switches[7:1],1'b0})
+		.switches(switches)
 		);
 
 	UART nouart (	/* no u */