From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Mon, 7 Apr 2008 06:33:39 +0000 (-0400)
Subject: ALU8IMM
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/f888201b9894683abfff012bd68b641319fb2744?ds=sidebyside;hp=fc443a4f61b38236a17ab2928bd90327edc68266

ALU8IMM
---

diff --git a/GBZ80Core.v b/GBZ80Core.v
index 36cd76a..af5574f 100644
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -52,6 +52,7 @@
 `define INSN_LDH_AC		8'b111x0010	// Either LDH A,(C) or LDH (C),A
 `define INSN_LDx_AHL		8'b001xx010	// LDD/LDI A,(HL) / (HL),A
 `define INSN_ALU8		8'b10xxxxxx	// 10 xxx yyy
+`define INSN_ALU8IMM		8'b11xxx110
 `define INSN_NOP		8'b00000000
 `define INSN_RST		8'b11xxx111
 `define INSN_RET		8'b110x1001	// 1 = RETI, 0 = RET
diff --git a/Uart.v b/Uart.v
index 3dd1532..af173ca 100644
--- a/Uart.v
+++ b/Uart.v
@@ -1,5 +1,5 @@
 `define IN_CLK 8388608
-`define OUT_CLK 9600
+`define OUT_CLK 57600
 `define CLK_DIV `IN_CLK / `OUT_CLK
 `define MMAP_ADDR 16'hFF50
 
diff --git a/diag.asm b/diag.asm
index 004935a..28fce99 100644
--- a/diag.asm
+++ b/diag.asm
@@ -49,21 +49,16 @@ irqhand:
 	
 	ld hl, $DF81
 	ld a, [hl]
-	ld b, 1
-	add b
+	add 1
 	ld c, $51
 	ld [c], a
 	ld [hl], a
 
-
 	POP HL
 	POP DE
 	POP BC
 	POP AF
 	RETI
-	db $18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE
-	db $18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE
-	db $18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE,$18,$FE
 
 ; Memory tester: writes h ^ l to all addresses from C000 to DF80.
 memtest:
@@ -75,11 +70,11 @@ memtest:
 	ld a,h
 	xor l
 	ld [hli],a
-	ld a, $DF
-	cp h
+	ld a, h
+	cp $DF
 	jr nz, .wr
-	ld a, $80
-	cp l
+	ld a, l
+	cp $80
 	jr nz, .wr
 
 	ld hl, $C001		; Read loop
@@ -91,11 +86,11 @@ memtest:
 	cp b
 	jr nz, .memfail
 	
-	ld a, $DF
-	cp h
+	ld a, h
+	cp $DF
 	jr nz, .rd
-	ld a, $80
-	cp l
+	ld a, l
+	cp $80
 	jr nz, .rd
 	
 	ld hl, testokstr	; Say we're OK
@@ -130,16 +125,12 @@ puthex:				; Put two hex nibbles to the serial console.
 	rra
 	rra
 	rra
-	ld b,$0F
-	and b
-	ld b,$30
-	add b
+	and $0F
+	add $30
 	call putc
 	pop af
-	ld b,$0F
-	and b
-	ld b,$30
-	add b
+	and $0F
+	add $30
 	call putc
 	ret
 
@@ -152,14 +143,13 @@ waitsw:
 	xor a
 	ld [c],a
 	
-	ld b, $0
 .loop1:
 	ld a,[c]
-	cp b
+	cp $0
 	jr z,.loop1
 .loop2:
 	ld a,[c]
-	cp b
+	cp $0
 	jr nz,.loop2
 	ret
 
@@ -203,8 +193,7 @@ insntest:
 
 	; Test JR
 	ld a, $FF
-	ld b, $00
-	cp b
+	cp $0
 	jr nz,.jr
 	ld hl, .jrfail
 	jr .fail
@@ -226,20 +215,17 @@ insntest:
 	; Test CP.
 	ld hl, .cpfail
 	ld a, $10
-	ld b, $20
-	cp b
+	cp $20
 	jr nc,.fail
 	ld a, $20
-	ld b, $10
-	cp b
+	cp $10
 	jr c,.fail
 	
 	; Test CPL
 	ld hl, .cplfail
 	ld a, $55
-	ld b, $AA
 	cpl
-	cp b
+	cp $AA
 	jr nz,.fail
 	
 	ld hl, .ok
@@ -275,12 +261,11 @@ insntest:
 
 ; Serial port manipulation functions.
 putc:
-	ld b, 0
 	ld c, $50
 	push af
 .waitport:
 	ld a,[c]
-	cp b
+	cp $00
 	jr nz,.waitport
 	pop af
 	ld [c],a
@@ -288,8 +273,7 @@ putc:
 
 puts:
 	ld a, [hli]
-	ld b, $00
-	cp b
+	cp $00
 	ret z
 	call putc
 	jr puts
diff --git a/insn_alu8.v b/insn_alu8.v
index 161418b..b6d4c63 100644
--- a/insn_alu8.v
+++ b/insn_alu8.v
@@ -1,6 +1,9 @@
 `ifdef EXECUTE
-	`INSN_ALU8: begin
-		if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0))
+	`INSN_ALU8,`INSN_ALU8IMM: begin
+		if ((opcode[7:6] == 2'b11) && (cycle == 0)) begin	// alu8imm
+			`EXEC_INC_PC
+			`EXEC_READ(`_PC + 1)
+		end else if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0))
 			`EXEC_READ(`_HL)
 		else begin
 			`EXEC_NEWCYCLE
@@ -20,8 +23,8 @@
 `endif
 
 `ifdef WRITEBACK
-	`INSN_ALU8: begin
-		if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0)) begin
+	`INSN_ALU8,`INSN_ALU8IMM: begin
+		if (((opcode[2:0] == `INSN_reg_dHL) || (opcode[7:6] == 2'b11)) && (cycle == 0)) begin
 			/* Sit on our asses. */
 		end else begin		/* Actually do the computation! */
 			case (opcode[5:3])
diff --git a/rom.asm b/rom.asm
index 0c25fab..cf8fd60 100644
--- a/rom.asm
+++ b/rom.asm
@@ -44,8 +44,7 @@ irqhand:
 	
 	ld hl, $DF81
 	ld a, [hl]
-	ld b, 1
-	add b
+	add 1
 	ld c, $51
 	ld [c], a
 	ld [hl], a