From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Thu, 22 May 2008 02:58:50 +0000 (-0400)
Subject: Add set/res, which fixes some crashes in the test suite
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/c5c1b7f3cd81b5776f5c450b44354d254eb3dc71?hp=1eb82e46a20fba718e0dd0e7ced354451189ea09

Add set/res, which fixes some crashes in the test suite
---

diff --git a/Makefile b/Makefile
index eaf0a6e..2779109 100644
--- a/Makefile
+++ b/Makefile
@@ -12,7 +12,8 @@ VLOGS_ALL = $(VLOGS) core/insn_call-callcc.v core/insn_incdec16.v \
 	core/insn_vop_intr.v core/insn_ldm8_a.v core/insn_ldm16_a.v \
 	core/insn_ldbcde_a.v core/insn_alu_ext.v core/insn_bit.v \
 	core/insn_two_byte.v core/insn_incdec_reg8.v core/insn_add_hl.v \
-	core/insn_add_sp_imm8.v core/insn_ldhl_sp_imm8.v core/insn_ld_nn_sp.v
+	core/insn_add_sp_imm8.v core/insn_ldhl_sp_imm8.v core/insn_ld_nn_sp.v \
+	core/insn_setres.v
 
 all: CoreTop.svf
 
diff --git a/broken-tests b/broken-tests
index fbe9c56..a164b5d 100644
--- a/broken-tests
+++ b/broken-tests
@@ -14,7 +14,6 @@ TEST 06: (HL/BC/DE) insns
 35 (DEC (HL))
 34 (INC (HL))
 CB 1E (RR (HL))
-[test crashes, likely on RES]
 
 TEST 07: Immediate insns
 
@@ -39,7 +38,6 @@ CB 1B (RR E)
 CB 1C (RR H)
 CB 1D (RR L)
 CB 1F (RR A)
-[test crashes, likely on RES]
 
 TEST 09: BC/DE/HL arith
 09 (ADD HL, BC)
diff --git a/core/allinsns.v b/core/allinsns.v
index b7065ef..59571d9 100644
--- a/core/allinsns.v
+++ b/core/allinsns.v
@@ -32,4 +32,5 @@
 `include "insn_add_hl.v"
 `include "insn_ldhl_sp_imm8.v"
 `include "insn_add_sp_imm8.v"
-`include "insn_ld_nn_sp.v"
\ No newline at end of file
+`include "insn_ld_nn_sp.v"
+`include "insn_setres.v"
diff --git a/core/insn_setres.v b/core/insn_setres.v
new file mode 100644
index 0000000..1df8b87
--- /dev/null
+++ b/core/insn_setres.v
@@ -0,0 +1,42 @@
+`define INSN_SETRES		9'b11xxxxxxx
+
+`ifdef EXECUTE
+	`INSN_SETRES: begin
+		if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 0)) begin
+			`EXEC_READ(`_HL)
+		end else if ((opcode[2:0] == `INSN_reg_dHL) && (cycle == 3)) begin
+			`EXEC_NEWCYCLE
+		end else begin	/* It doesn't hurt for this to be done on cycle = 3, but it doesn't do any good then either. */
+			`EXEC_INC_PC
+			case (opcode[2:0])
+			`INSN_reg_A:	tmp <= opcode[6] ? (`_A | (8'b1 << opcode[5:3])) : (`_A & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_B:	tmp <= opcode[6] ? (`_B | (8'b1 << opcode[5:3])) : (`_B & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_C:	tmp <= opcode[6] ? (`_C | (8'b1 << opcode[5:3])) : (`_C & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_D:	tmp <= opcode[6] ? (`_D | (8'b1 << opcode[5:3])) : (`_D & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_E:	tmp <= opcode[6] ? (`_E | (8'b1 << opcode[5:3])) : (`_E & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_H:	tmp <= opcode[6] ? (`_H | (8'b1 << opcode[5:3])) : (`_H & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_L:	tmp <= opcode[6] ? (`_L | (8'b1 << opcode[5:3])) : (`_L & ~(8'b1 << opcode[5:3]));
+			`INSN_reg_dHL:	tmp <= opcode[6] ? (rdata | (8'b1 << opcode[5:3])) : (rdata & ~(8'b1 << opcode[5:3]));
+			endcase
+			if (opcode[2:0] != `INSN_reg_dHL) begin
+				`EXEC_NEWCYCLE
+			end
+		end
+	end
+`endif
+
+`ifdef WRITEBACK
+	`INSN_SETRES: begin
+		if ((opcode[2:0] != `INSN_reg_dHL) || (cycle == 1))
+			case (opcode[2:0])
+			`INSN_reg_A:	`_A <= tmp;
+			`INSN_reg_B:	`_B <= tmp;
+			`INSN_reg_C:	`_C <= tmp;
+			`INSN_reg_D:	`_D <= tmp;
+			`INSN_reg_E:	`_E <= tmp;
+			`INSN_reg_H:	`_H <= tmp;
+			`INSN_reg_L:	`_L <= tmp;
+			`INSN_reg_dHL:	begin `EXEC_WRITE(`_HL, tmp) end
+			endcase
+	end
+`endif