From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Fri, 9 May 2008 12:02:15 +0000 (-0400)
Subject: Merge andrew:/afs/andrew/usr/czl/public/FPGABoy
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/714630d3e8be5d536b67fa25f4b4745e9aaf42a3?hp=45d9d1c679e9ccbac6cad76107a2977d6cb69ddc

Merge andrew:/afs/andrew/usr/czl/public/FPGABoy
---

diff --git a/PS2Button.v b/PS2Button.v
new file mode 100644
index 0000000..e65226c
--- /dev/null
+++ b/PS2Button.v
@@ -0,0 +1,81 @@
+module PS2Button(
+	input inclk,
+	input indata,
+	input rst,
+	output outclk,
+	output outdata,
+	output reg [7:0] buttons
+	);
+
+	assign outdata = 1'b1;
+	assign outclk = 1'b1;
+
+	reg bitcount [3:0] = 0;
+	reg [7:0] key;
+	reg keyarrow, keyup, parity;
+	reg key_a,key_b,key_st,key_sel,key_up,key_dn,key_l,key_r;
+
+	assign buttons = {key_st,key_sel,key_b,key_a,key_dn,key_up,key_l,key_r};
+
+	always @ (negedge inclk) begin
+		if(bitcount == 10) begin
+			bitcount <= 0;
+			if(parity == (^ key)) begin
+				if(keyarrow) begin
+					keyarrow <= 0;
+					case(key)
+						8'hF0: keyup <= 1;
+						8'h75: key_up <= 1;
+						8'h74: key_r <= 1;
+						8'h72: key_dn <= 1;
+						8'h6B: key_l <= 1;
+					endcase
+				end
+				else begin
+					if(keyup) begin
+						keyup <= 0;
+						case(key)
+							8'h75: key_up <= 0;
+							8'h74: key_r <= 0;
+							8'h72: key_dn <= 0;
+							8'h6B: key_l <= 0;
+							8'h1C: key_a <= 0;
+							8'h1B: key_b <= 0;
+							8'h5A: key_st <= 0;
+							8'h59: key_sel <= 0;
+						endcase
+					end
+					else begin
+						case(key)
+							8'hE0: keyarrow <= 1;
+							8'hF0: keyup <= 1;
+							8'h1C: key_a <= 1;
+							8'h1B: key_b <= 1;
+							8'h5A: key_st <= 1;
+							8'h59: key_sel <= 1;
+						endcase
+					end
+				end
+			end
+			else begin
+				keyarrow <= 0;
+				keyup <= 0;
+				{key_a,key_b,key_st,key_sel,key_up,key_dn,key_l,key_r} <= 8'b0;
+			end
+		end else
+			bitcount <= bitcount + 1;
+
+		case(bitcount)
+			1: key[0] <= indata;
+			2: key[1] <= indata;
+			3: key[2] <= indata;
+			4: key[3] <= indata;
+			5: key[4] <= indata;
+			6: key[5] <= indata;
+			7: key[6] <= indata;
+			8: key[7] <= indata;
+			9: parity <= indata;
+		endcase
+	end
+
+endmodule