From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Thu, 22 May 2008 03:32:51 +0000 (-0400)
Subject: Fix some flag bugs in INC and DEC
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/65d3506eebbdc5ae3e52c112b0ef74e447553586

Fix some flag bugs in INC and DEC
---

diff --git a/broken-tests b/broken-tests
index a164b5d..e388d35 100644
--- a/broken-tests
+++ b/broken-tests
@@ -11,22 +11,11 @@ TEST 04: LD r,r
 TEST 05: Misc insns
 
 TEST 06: (HL/BC/DE) insns
-35 (DEC (HL))
-34 (INC (HL))
 CB 1E (RR (HL))
 
 TEST 07: Immediate insns
 
 TEST 08: Register insns
-37 (SCF)
-3F (CCF)
-05 (DEC B)
-0D (DEC C)
-15 (DEC D)
-1D (DEC E)
-25 (DEC H)
-2D (DEC L)
-3D (DEC A)
 07 (RLCA)
 17 (RLA)
 0F (RRCA)
diff --git a/core/insn_incdec_hl.v b/core/insn_incdec_hl.v
index 1406fd8..656353a 100644
--- a/core/insn_incdec_hl.v
+++ b/core/insn_incdec_hl.v
@@ -4,7 +4,10 @@
 	`INSN_INCDEC_HL: begin
 		case (cycle)
 		0:	`EXEC_READ(`_HL)
-		1:	`EXEC_WRITE(`_HL, rdata + (opcode[0] ? 8'hFF : 8'h01))
+		1:	begin
+				`EXEC_WRITE(`_HL, rdata + (opcode[0] ? 8'hFF : 8'h01))
+				tmp <= rdata + (opcode[0] ? 8'hFF : 8'h01);
+			end
 		2:	begin
 				`EXEC_INC_PC
 				`EXEC_NEWCYCLE
@@ -15,6 +18,12 @@
 
 `ifdef WRITEBACK
 	`INSN_INCDEC_HL: begin
-		/* meh meh */
+		if (cycle == 1)
+			`_F <= {
+				(tmp == 8'h00) ? 1'b1 : 1'b0,	/* Z */
+				opcode[0],	 /* N */
+				(tmp[3:0] == (opcode[0] ? 4'hF : 4'h0)) ? 1'b1 : 1'b0,
+				`_F[4:0]
+			};
 	end
 `endif
diff --git a/core/insn_incdec_reg8.v b/core/insn_incdec_reg8.v
index e89ceba..b7ed993 100644
--- a/core/insn_incdec_reg8.v
+++ b/core/insn_incdec_reg8.v
@@ -5,13 +5,13 @@
 		`EXEC_INC_PC
 		`EXEC_NEWCYCLE
 		case (opcode[5:3])
-		`INSN_reg_A:	tmp <= `_A;
-		`INSN_reg_B:	tmp <= `_B;
-		`INSN_reg_C:	tmp <= `_C;
-		`INSN_reg_D:	tmp <= `_D;
-		`INSN_reg_E:	tmp <= `_E;
-		`INSN_reg_H:	tmp <= `_H;
-		`INSN_reg_L:	tmp <= `_L;
+		`INSN_reg_A:	tmp <= `_A + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_B:	tmp <= `_B + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_C:	tmp <= `_C + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_D:	tmp <= `_D + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_E:	tmp <= `_E + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_H:	tmp <= `_H + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_L:	tmp <= `_L + (opcode[0] ? 8'hFF : 8'h01);
 		endcase
 	end
 `endif
@@ -19,18 +19,19 @@
 `ifdef WRITEBACK
 	`INSN_INCDEC_reg8: begin
 		case (opcode[5:3])
-		`INSN_reg_A:	`_A <= tmp + (opcode[0] ? 8'hFF : 8'h01);
-		`INSN_reg_B:	`_B <= tmp + (opcode[0] ? 8'hFF : 8'h01);
-		`INSN_reg_C:	`_C <= tmp + (opcode[0] ? 8'hFF : 8'h01);
-		`INSN_reg_D:	`_D <= tmp + (opcode[0] ? 8'hFF : 8'h01);
-		`INSN_reg_E:	`_E <= tmp + (opcode[0] ? 8'hFF : 8'h01);
-		`INSN_reg_H:	`_H <= tmp + (opcode[0] ? 8'hFF : 8'h01);
-		`INSN_reg_L:	`_L <= tmp + (opcode[0] ? 8'hFF : 8'h01);
+		`INSN_reg_A:	`_A <= tmp;
+		`INSN_reg_B:	`_B <= tmp;
+		`INSN_reg_C:	`_C <= tmp;
+		`INSN_reg_D:	`_D <= tmp;
+		`INSN_reg_E:	`_E <= tmp;
+		`INSN_reg_H:	`_H <= tmp;
+		`INSN_reg_L:	`_L <= tmp;
 		endcase
 		`_F <= {
-				((tmp + (opcode[0] ? 8'hFF : 8'h01)) == 8'h00) ? 1'b1 : 1'b0,
-				1'b0,
-				(({1'b0,tmp[3:0]} + (opcode[0] ? 5'h1F : 5'h01)) >> 4) ? 1'b1 : 1'b0,
-				`_F[4:0]};
+				(tmp == 8'h00) ? 1'b1 : 1'b0,	/* Z */
+				opcode[0],	 /* N */
+				(tmp[3:0] == (opcode[0] ? 4'hF : 4'h0)) ? 1'b1 : 1'b0,
+				`_F[4:0]
+			};
 	end
 `endif