From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Sat, 10 May 2008 10:01:45 +0000 (-0400)
Subject: RAM needs to be writable, I guess
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/492e55f50f4660d16be8e81466813096d492e67d?ds=sidebyside

RAM needs to be writable, I guess
---

diff --git a/System.v b/System.v
index 37ca872..02b424c 100644
--- a/System.v
+++ b/System.v
@@ -114,7 +114,7 @@ module CellularRAM(
 	reg [8:0] rombank = 1;
 	
 	assign cr_nOE = decode ? ~rdlatch : 1;
-	assign cr_nWE = (decode && ((addrlatch == ADDR_PROGDATA) || (mbc_emul[6:0] == 0))) ? ~wrlatch : 1;
+	assign cr_nWE = (decode && ((addrlatch == ADDR_PROGDATA) || (mbc_emul[6:0] == 0) || (addrlatch[15:13] == 3'b101))) ? ~wrlatch : 1;
 	
 	assign cr_DQ = (~cr_nOE) ? 16'bzzzzzzzzzzzzzzzz : {8'b0, datalatch};
 	assign cr_A = (addrlatch[15:14] == 2'b00) ? /* extrom, home bank */ {9'b0,addrlatch[13:0]} :