From: Joshua Wise Date: Sat, 10 May 2008 08:14:53 +0000 (-0400) Subject: Instructions: ld hl, sp+imm8 and add sp, imm8 X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/41341eb3bab6479dc763afbe90c7c31a01d6b60f?ds=inline;hp=e7fe9dc201afb96f401fb2d3cf5aa19aa7e8e796 Instructions: ld hl, sp+imm8 and add sp, imm8 --- diff --git a/core/allinsns.v b/core/allinsns.v index dfdf04f..4ecd2b1 100644 --- a/core/allinsns.v +++ b/core/allinsns.v @@ -30,3 +30,5 @@ `include "insn_bit.v" `include "insn_alu_ext.v" `include "insn_add_hl.v" +`include "insn_ldhl_sp_imm8.v" +`include "insn_add_sp_imm8.v" diff --git a/core/insn_add_sp_imm8.v b/core/insn_add_sp_imm8.v new file mode 100644 index 0000000..06d58cc --- /dev/null +++ b/core/insn_add_sp_imm8.v @@ -0,0 +1,26 @@ +`define INSN_ADD_SP_IMM8 9'b011101000 + +`ifdef EXECUTE + `INSN_ADD_SP_IMM8: begin + case (cycle) + 0: begin + `EXEC_INC_PC + end + 1: begin + `EXEC_READ(`_PC) + end + 3: begin + `EXEC_NEWCYCLE + `EXEC_INC_PC + end + endcase + end +`endif + +`ifdef WRITEBACK + `INSN_ADD_SP_IMM8: begin + case (cycle) + 2: `_HL <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata}; + endcase + end +`endif diff --git a/core/insn_ldhl_sp_imm8.v b/core/insn_ldhl_sp_imm8.v new file mode 100644 index 0000000..688465a --- /dev/null +++ b/core/insn_ldhl_sp_imm8.v @@ -0,0 +1,26 @@ +`define INSN_LDHL_SP_IMM8 9'b011111000 + +`ifdef EXECUTE + `INSN_LDHL_SP_IMM8: begin + case (cycle) + 0: begin + `EXEC_INC_PC + end + 1: begin + `EXEC_READ(`_PC) + end + 2: begin + `EXEC_NEWCYCLE + `EXEC_INC_PC + end + endcase + end +`endif + +`ifdef WRITEBACK + `INSN_LDHL_SP_IMM8: begin + case (cycle) + 2: `_HL <= `_SP + {rdata[7] ? 8'hFF : 8'h00, rdata}; + endcase + end +`endif diff --git a/opcodes b/opcodes index 451a6b6..8aa627e 100644 --- a/opcodes +++ b/opcodes @@ -11,8 +11,6 @@ bits insn notes 0001 0000 STOP 0111 0110 HALT Danger! Helvetica! 1100 1011 - - - see two-byte opcodes below -1110 1000 ADD SP, imm8 -1111 1000 LDHL SP, imm8 load SP+n (signed n) into HL *****************************