From: Joshua Wise <joshua@rebirth.joshuawise.com>
Date: Thu, 3 Apr 2008 09:38:14 +0000 (-0400)
Subject: Add an instruction tester to the test ROM.
X-Git-Url: http://git.joshuawise.com/fpgaboy.git/commitdiff_plain/20204e795d54fb0758a79f0abd5fb443c0178a54

Add an instruction tester to the test ROM.
---

diff --git a/FPGABoy.ise b/FPGABoy.ise
index 06b8ca4..7374a59 100644
Binary files a/FPGABoy.ise and b/FPGABoy.ise differ
diff --git a/GBZ80Core.v b/GBZ80Core.v
index 0f0496e..e125225 100644
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -289,7 +289,7 @@ module GBZ80Core(
 						`INSN_stack_HL:	wdata <= registers[`REG_L];
 						endcase
 					end
-				2:	begin /* TWIDDLE OUR FUCKING THUMBS! */ end
+				2:	begin /* Twiddle thumbs. */ end
 				3:	begin
 						`EXEC_NEWCYCLE;
 						`EXEC_INC_PC;
diff --git a/rom.asm b/rom.asm
index 640c2b0..02f095b 100644
--- a/rom.asm
+++ b/rom.asm
@@ -1,25 +1,32 @@
 	SECTION "a",HOME
+
 main:
-	ld c, $51
+	ld c, $51	; Note that we are alive.
 	ld a, $FF
 	ld [c],a
-	ld sp,$DFFF
 
-	ld hl,text
+	ld sp, $DFFF
+
+	ld hl, signon
 	call puts
 	
 	call memtest
+
+	call insntest
+
 	call waitsw
+
 	jp main
 
-text:
+signon:
 	db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
 
+; Memory tester: writes h ^ l to all addresses from C000 to DF80.
 memtest:
 	ld hl,memteststr
 	call puts
 	
-	ld hl, $C000
+	ld hl, $C000		; Write loop
 .wr:
 	ld a,h
 	xor l
@@ -31,7 +38,7 @@ memtest:
 	cp l
 	jp nz, .wr
 
-	ld hl, $C000
+	ld hl, $C000		; Read loop
 .rd:
 	ld a,h
 	xor l
@@ -47,11 +54,11 @@ memtest:
 	cp l
 	jp nz, .rd
 	
-	ld hl, testokstr
+	ld hl, testokstr	; Say we're OK
 	call puts
 	ret
-.memfail:
-	@ decrement hl the easy way
+.memfail:			; Say we failed (sadface)
+	; decrement hl the easy way
 	ld a,[hld]
 	push hl
 	ld hl, failatstr
@@ -66,14 +73,14 @@ memtest:
 	ld a, $0D
 	call putc
 	ret
-
 memteststr:
 	db "Testing memory from $C000 to $DF80...",0
 testokstr:
 	db " OK!",$0D,$0A,0
 failatstr:
 	db " Test failed at $",0
-puthex:
+
+puthex:				; Put two hex nibbles to the serial console.
 	push af
 	rra
 	rra
@@ -92,6 +99,7 @@ puthex:
 	call putc
 	ret
 
+; Wait for switches to be flipped on and off again.
 waitsw:
 	ld hl,waitswstr
 	call puts
@@ -115,6 +123,74 @@ waitsw:
 waitswstr:
 	db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
 
+; Core instruction basic acceptance tests.
+insntest:
+	ld hl, .insnteststr
+	call puts
+	
+	; Test PUSH and POP.
+	ld b, $12
+	ld c, $34
+	ld d, $56
+	ld e, $78
+	push bc
+	pop de
+	ld hl, .pushpopfail
+	ld a, d
+	cp b
+	jp nz,.fail
+	ld a, e
+	cp c
+	jp nz,.fail
+	
+	; Test ALU (HL).
+	ld hl, .ff
+	ld a, $FF
+	xor [hl]
+	ld hl, .xorhlfail
+	jp nz, .fail
+	
+	; Test CP.
+	ld hl, .cpfail
+	ld a, $10
+	ld b, $20
+	cp b
+	jp nc,.fail
+	ld a, $20
+	ld b, $10
+	cp b
+	jp c,.fail
+	
+	; Test CPL
+	ld hl, .cplfail
+	ld a, $55
+	ld b, $AA
+	cpl
+	cp b
+	jp nz,.fail
+	
+	ld hl, .ok
+	call puts
+	ret
+.fail:
+	call puts
+	ret
+.insnteststr:
+	db "Testing instructions... ",$0
+.pushpopfail:
+	db "PUSH/POP test failed.",$0D,$0A,0
+.ff:
+	db $FF
+.xorhlfail:
+	db "XOR [HL] test failed.",$0D,$0A,0
+.cpfail:
+	db "CP test failed.",$0D,$0A,0
+.cplfail:
+	db "CPL test failed.",$0D,$0A,0
+.ok:
+	db "OK!",$0D,$0A,0
+
+; Serial port manipulation functions.
 putc:
 	push af
 	ld b, 0