insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v System.v CPUDCM.v \
insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
- Timer.v LCDC.v insn_ldm_a.v Framebuffer.v
+ Timer.v LCDC.v insn_ldm8_a.v insn_ldm16_a.v Framebuffer.v
all: CoreTop_rom.svf CoreTop_diag.svf CoreTop.twr
`include "insn_di-ei.v"
`include "insn_incdec_hl.v"
`include "insn_incdec_reg8.v"
-`include "insn_ldm_a.v"
+`include "insn_ldm8_a.v"
+`include "insn_ldm16_a.v"
PUSH HL
xor a
- ld c, $0F
- ld [c], a
-
+ ld [$FF0F], a
+
ld c, $42 ; SCY
ld a, [c]
inc a
PUSH BC
xor a
- ld c, $0F
- ld [c], a
+ ld [$FF0F], a
POP BC
POP AF
PUSH HL
xor a
- ld c, $0F
- ld [c], a
+ ld [$FF0F], a
ld c, $45 ; LYC
ld a, [c]
inc a
ld [c], a
- ld hl, $DF82
- ld a, [hld]
+ ld a, [$DF82]
cp 0
jr z, .noprint
ld a, $41 ; print A
call putc
.noprint:
- inc [hl]
- ld a, [hl]
- ld c, $51
- ld [c], a
+ ld a, [$DF81]
+ inc a
+ ld [$DF81], a
+ ld [$FF51], a
POP HL
POP DE
ld hl,memteststr
call puts
- ld hl, $C001 ; Write loop
+ ld hl, $C000 ; Write loop
.wr:
ld a,h
xor l
cp $80
jr nz, .wr
- ld hl, $C001 ; Read loop
+ ld hl, $C000 ; Read loop
.rd:
ld a,h
xor l
ret
.memfail: ; Say we failed (sadface)
; decrement hl the easy way
- ld a,[hld]
+ dec [hl]
push hl
ld hl, failatstr
call puts
`EXEC_READ(`_PC + 16'h0001)
end
2: if (opcode[4]) // LD A,x
- `EXEC_READ(({tmp, tmp2}))
+ `EXEC_READ(({rdata, tmp}))
else
- `EXEC_WRITE(({tmp, tmp2}), `_A)
+ `EXEC_WRITE(({rdata, tmp}), `_A)
3: begin
`EXEC_NEWCYCLE
`EXEC_INC_PC
`INSN_LD16M_A: begin
case (cycle)
0: begin end
- 1: tmp2 <= rdata;
- 2: tmp <= rdata;
+ 1: tmp <= rdata;
+ 2: begin end
3: if (opcode[4]) `_A <= rdata;
endcase
end
--- /dev/null
+// If opcode[4], then ld A, x, else ld x, A
+// If opcode[1], then ld 16m8, else ld 8m8
+
+`ifdef EXECUTE
+ `INSN_LD8M_A: begin
+ case (cycle)
+ 0: begin
+ `EXEC_INC_PC
+ `EXEC_READ(`_PC + 16'h0001)
+ end
+ 1: if (opcode[4]) // LD A,x
+ `EXEC_READ(({8'hFF, rdata}))
+ else
+ `EXEC_WRITE(({8'hFF, rdata}), `_A)
+ 2: begin
+ `EXEC_NEWCYCLE
+ `EXEC_INC_PC
+ end
+ endcase
+ end
+`endif
+
+`ifdef WRITEBACK
+ `INSN_LD8M_A: begin
+ case (cycle)
+ 0: begin end
+ 2: begin end
+ 3: if (opcode[4]) `_A <= rdata;
+ endcase
+ end
+`endif
+