Cut 1 at ADD HL,...

diff --git a/GBZ80Core.v b/GBZ80Core.v
index 29aab5203b4c24c909f6cfab270ffc9b0ecbeaff..053df4a1a4619c6a8eaf7a220ff21d6bd9418f3a 100644 (file)
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -79,6 +79,7 @@
 `define INSN_BIT               9'b101xxxxxx
 `define INSN_RES               9'b110xxxxxx
 `define INSN_SET               9'b111xxxxxx
 `define INSN_BIT               9'b101xxxxxx
 `define INSN_RES               9'b110xxxxxx
 `define INSN_SET               9'b111xxxxxx

+`define INSN_ADD_HL            9'b000xx1001

 
 `define INSN_cc_NZ             2'b00
 `define INSN_cc_Z              2'b01
 
 `define INSN_cc_NZ             2'b00
 `define INSN_cc_Z              2'b01

diff --git a/Makefile b/Makefile
index 5e50da8d38970a028e4550bff7ec993061392d95..40ea54287cffa8013f51e1dc817dba3ca6879792 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -8,7 +8,7 @@ VLOGS_ALL = $(VLOGS) insn_call-callcc.v insn_incdec16.v insn_jr-jrcc.v \
        CPUDCM.v insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
        insn_ldm8_a.v insn_ldm16_a.v insn_ldbcde_a.v insn_alu_ext.v \
        CPUDCM.v insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
        insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
        insn_ldm8_a.v insn_ldm16_a.v insn_ldbcde_a.v insn_alu_ext.v \

-       insn_bit.v insn_two_byte.v insn_incdec_reg8.v
+       insn_bit.v insn_two_byte.v insn_incdec_reg8.v insn_add_hl.v

 
 all: CoreTop.svf
 
 
 all: CoreTop.svf
 

diff --git a/allinsns.v b/allinsns.v
index 6c1c487260f7407c9edd560410aa9c10031cd6eb..dfdf04fc536e6b244e54ec78bc27a8b4a877e568 100644 (file)
--- a/allinsns.v
+++ b/allinsns.v
@@ -29,3 +29,4 @@
 `include "insn_two_byte.v"
 `include "insn_bit.v"
 `include "insn_alu_ext.v"
 `include "insn_two_byte.v"
 `include "insn_bit.v"
 `include "insn_alu_ext.v"

+`include "insn_add_hl.v"

diff --git a/insn_add_hl.v b/insn_add_hl.v
new file mode 100644 (file)
index 0000000..8ff25f4
--- /dev/null
+++ b/insn_add_hl.v
@@ -0,0 +1,33 @@
+`ifdef EXECUTE
+       `INSN_ADD_HL: begin
+               case (cycle)
+               0:      case (opcode[5:4])
+                       `INSN_reg16_BC: {tmp,tmp2} <= `_BC;
+                       `INSN_reg16_DE: {tmp,tmp2} <= `_DE;
+                       `INSN_reg16_HL: {tmp,tmp2} <= `_HL;
+                       `INSN_reg16_SP: {tmp,tmp2} <= `_SP;
+                       endcase
+               1:      begin
+                               `EXEC_INC_PC
+                               `EXEC_NEWCYCLE
+                       end
+               endcase
+       end
+`endif
+
+`ifdef WRITEBACK
+       `INSN_ADD_HL: begin
+               case (cycle)
+               0:      {tmp,tmp2} <= `_HL + {tmp,tmp2};
+               1:      begin
+                               `_F <=  { /* Z */ `_F[7],
+                                         /* N */ 1'b0,
+                                         /* H */ (({`_HL} + {tmp,tmp2}) & 16'h1000) ? 1'b1 : 1'b0,
+                                         /* C */ (({1'b0,`_HL} + {1'b0,tmp,tmp2}) >> 16 == 1) ? 1'b1 : 1'b0,
+                                         `_F[3:0]
+                                       };
+                               `_HL <= {tmp, tmp2};
+                       end
+               endcase
+       end
+`endif

diff --git a/opcodes b/opcodes
index 09f68fbce78aa2756211461a9e610ad3ede999ba..451a6b6f88a8bc6756308bad670800b8551cc5fe 100644 (file)
--- a/opcodes
+++ b/opcodes
@@ -8,11 +8,7 @@ imm16 = 16-bit immediate value
 
 bits         insn                 notes
 0000 1000    LD    16m16,SP      loads SP
 
 bits         insn                 notes
 0000 1000    LD    16m16,SP      loads SP

-0000 1001    ADD   HL,   BC

 0001 0000    STOP
 0001 0000    STOP

-0001 1001    ADD   HL,   DE
-0010 1001    ADD   HL,   HL
-0011 1001    ADD   HL,   SP

 0111 0110    HALT                 Danger! Helvetica!
 1100 1011    -     -     -        see two-byte opcodes below
 1110 1000    ADD   SP,   imm8
 0111 0110    HALT                 Danger! Helvetica!
 1100 1011    -     -     -        see two-byte opcodes below
 1110 1000    ADD   SP,   imm8