X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/f6fa1d6e1393de5d18302b8674ed1616afdfcefb..a42afaa9d03ed6cd15b1c3d2ec8d4c61c78bf09e:/diag.asm diff --git a/diag.asm b/diag.asm index 8e09874..668452d 100644 --- a/diag.asm +++ b/diag.asm @@ -32,6 +32,11 @@ main: ld hl, signon call puts + + ld a, $91 + ld [$FF40], a + + call putscreen ei @@ -48,6 +53,87 @@ main: signon: db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0 +tiles: + db %01111100 + db %11000110 + db %11000110 + db %11111110 + db %11000110 + db %11000110 + db %11000110 + db %00000000 + + db %11111100 + db %11000110 + db %11000110 + db %11111100 + db %11000110 + db %11000110 + db %11111100 + db %00000000 + + db %01111100 + db %11000110 + db %11000010 + db %11000000 + db %11000010 + db %11000110 + db %01111100 + db %00000000 + + db %11111100 + db %11000110 + db %11000110 + db %11000110 + db %11000110 + db %11000110 + db %11111100 + db %00000000 + +putscreen: + ; Wait for vblank + call .vblwait + + ld hl, $8000 ; Copy two tiles. + ld de, tiles + ld c, $20 +.cloop: ld a, [de] + inc de + ld [hli], a + ld [hli], a + dec c + xor a + cp c + jr nz, .cloop + + ld hl, $9800 +.vloop: call .vblwait + ld c, $40 + ld b, 0 +.loop: ld a, b + inc b + and $03 + ld [hli], a + ld a, h + cp $9C + ret z + dec c + xor a + cp c + jr nz,.loop + jr .vloop + +.vblwait: +.stat1: ld a, [$FF41] ; STAT + and $03 + cp $00 + jp nz, .stat1 +.stat2: ld a, [$FF41] + and $03 + cp $01 + jr nz, .stat2 + ret + vbl: PUSH AF PUSH BC @@ -57,11 +143,23 @@ vbl: xor a ld [$FF0F], a - ld c, $42 ; SCY - ld a, [c] - inc a - ld [c], a + ld a, [$FF51] + bit 7, a + jr z, .nothing + bit 0, a + call nz, .scyup + + bit 1, a + call nz, .scydown + + bit 2, a + call nz, .scxup + + bit 3, a + call nz, .scxdown + +.nothing: POP HL POP DE POP BC @@ -69,6 +167,23 @@ vbl: RETI +.scyup: ld hl, $FF42 + inc [hl] + ret + +.scydown: ld hl, $FF42 + dec [hl] + ret + +.scxup: ld hl, $FF43 + inc [hl] + ret + +.scxdown: ld hl, $FF43 + dec [hl] + ret + + lcdc: PUSH AF PUSH BC