X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/e7fe9dc201afb96f401fb2d3cf5aa19aa7e8e796..99b9687942367fd256a797bcd1f67fec07f92a37:/core/GBZ80Core.v

diff --git a/core/GBZ80Core.v b/core/GBZ80Core.v
index fcc3337..4a1e256 100644
--- a/core/GBZ80Core.v
+++ b/core/GBZ80Core.v
@@ -146,64 +146,9 @@ module GBZ80Core(
 
 	reg ie, iedelay;
 
-	wire [7:0] rlc,rrc,rl,rr,sla,sra,swap,srl;
-	wire [3:0] rlcf,rrcf,rlf,rrf,slaf,sraf,swapf,srlf;
-	wire [7:0] alu_res;
-	wire [3:0] f_res;
-
-	assign rlc   = {tmp[6:0],tmp[7]};
-	assign rlcf  = {(tmp == 0 ? 1'b1 : 1'b0)
-			,2'b0,
-			tmp[7]};
-
-	assign rrc   = {tmp[0],tmp[7:1]};
-	assign rrcf  = {(tmp == 0 ? 1'b1 : 1'b0),
-			2'b0,
-			tmp[0]};
-
-	assign rl    = {tmp[6:0],`_F[4]};
-	assign rlf   = {({tmp[6:0],`_F[4]} == 0 ? 1'b1 : 1'b0),
-			2'b0,
-			tmp[7]};
-
-	assign rr    = {`_F[4],tmp[7:1]};
-	assign rrf   = {({tmp[4],tmp[7:1]} == 0 ? 1'b1 : 1'b0),
-			2'b0,
-			tmp[0]};
-
-	assign sla   = {tmp[6:0],1'b0};
-	assign slaf  = {(tmp[6:0] == 0 ? 1'b1 : 1'b0),
-			2'b0,
-			tmp[7]};
-
-	assign sra   = {tmp[7],tmp[7:1]};
-//	assign sraf  = {(tmp[7:1] == 0 ? 1'b1 : 1'b0),2'b0,tmp[0]};   now in assign srlf =
-
-	assign swap  = {tmp[3:0],tmp[7:4]};
-	assign swapf = {(tmp == 1'b0 ? 1'b1 : 1'b0),
-			3'b0};
-
-	assign srl   = {1'b0,tmp[7:1]};
-	assign srlf  = {(tmp[7:1] == 0 ? 1'b1 : 1'b0),
-			2'b0,
-			tmp[0]};
-	assign sraf  = srlf;
-
-	/*  Y U Q  */
-	assign {alu_res,f_res} =
-		opcode[5] ? (
-			opcode[4] ? (
-				opcode[3] ? {srl,srlf} : {swap,swapf}
-			) : (
-				opcode[3] ? {sra,sraf} : {sla,slaf}
-			)
-		) : (
-			opcode[4] ? (
-				opcode[3] ? {rr,rrf} : {rl,rlf}
-			) : (
-				opcode[3] ? {rrc,rrcf} : {rlc,rlcf}
-			)
-		);
+`define LOCALWIRES
+`include "allinsns.v"
+`undef LOCALWIRES
 
 	initial begin
 		`_A <= 0;
@@ -288,8 +233,10 @@ module GBZ80Core(
 			end
 			wr <= 0;
 			rd <= 0;
+`ifdef isim
 			address <= 16'bxxxxxxxxxxxxxxxx;	// Make it obvious if something of type has happened.
 			wdata <= 8'bxxxxxxxx;
+`endif
 			state <= `STATE_EXECUTE;
 		end
 		`STATE_EXECUTE: begin
@@ -302,7 +249,10 @@ module GBZ80Core(
 			`include "allinsns.v"
 			`undef EXECUTE
 			default:
+			begin
+				address <= {7'h78,opcode};	// Have the CPU tell you F0xx if something's gone wrong.
 				$stop;
+			end
 			endcase
 			state <= `STATE_WRITEBACK;
 		end