X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/c3cb12e87f7dd29f5ed5a8da179993a1affc20d8..d1b404569fd0bdc74a3397c4ef0a5c2e5f95c835:/GBZ80Core.v

diff --git a/GBZ80Core.v b/GBZ80Core.v
index 3c2f770..29aab52 100644
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -152,7 +152,7 @@ module GBZ80Core(
 	inout [15:0] bus1address,	/* BUS_* is latched on STATE_FETCH. */
 	inout [7:0] bus1data,
 	inout bus1wr, bus1rd,
-	input irq, input [7:0] jaddr,
+	input irq, output reg irqack, input [7:0] jaddr,
 	output reg [1:0] state);
 
 //	reg [1:0] state;					/* State within this bus cycle (see STATE_*). */
@@ -282,6 +282,7 @@ module GBZ80Core(
 		cycle <= 0;
 		twobyte <= 0;
 		bootstrap_enb <= 1;
+		irqack <= 0;
 	end
 
 	always @(negedge clk)	/* Set things up at the negedge to prepare for the posedge. */
@@ -341,8 +342,10 @@ module GBZ80Core(
 			state <= `STATE_EXECUTE;
 		end
 		`STATE_EXECUTE: begin
+		`ifdef isim
 			if (opcode[7:0] === 8'bxxxxxxxx)
 				$stop;
+		`endif
 			casex (opcode)
 			`define EXECUTE
 			`include "allinsns.v"