X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/c231e6fbb4876ff512be460e60451c77c7caab69..refs/heads/master:/System.v

diff --git a/System.v b/System.v
index f89b2a6..ec62236 100644
--- a/System.v
+++ b/System.v
@@ -1,5 +1,5 @@
-
 `timescale 1ns / 1ps
+
 module SimROM(
 	input [15:0] address,
 	inout [7:0] data,
@@ -242,6 +242,8 @@ module CoreTop(
 	output wire [22:0] cr_A,
 	inout [15:0] cr_DQ,
 	input ps2c, ps2d,
+	output txp, txm,
+	input rxp, rxm,
 `endif
 	output wire hs, vs,
 	output wire [2:0] r, g,
@@ -262,10 +264,11 @@ module CoreTop(
 	wire [7:0] switches = 8'b0;
 	wire [3:0] buttons = 4'b0;
 `else	
-	wire xtalb, clk, vgaclk;
+	wire xtalb, clk, vgaclk, ethclk;
 	IBUFG iclkbuf(.O(xtalb), .I(xtal));
-	CPUDCM dcm (.CLKIN_IN(xtalb), .CLKFX_OUT(clk));
+	CPUDCM cpudcm (.CLKIN_IN(xtalb), .CLKFX_OUT(clk));
 	pixDCM pixdcm (.CLKIN_IN(xtalb), .CLKFX_OUT(vgaclk));
+	ethDCM ethdcm (.CLKIN_IN(xtalb), .CLKFX_OUT(ethclk));
 	wire [7:0] ps2buttons;
 `endif
 
@@ -471,4 +474,20 @@ module CoreTop(
 		.wr(wr[0]),
 		.snd_data_l(soundl),
 		.snd_data_r(soundr));
+
+`ifdef isim
+`else	
+	Ethernet eth(
+		.clk(clk),
+		.wr(wr[0]),
+		.rd(rd[0]),
+		.addr(addr[0]),
+		.data(data[0]),
+		.ethclk(ethclk),
+		.rxclk(xtalb),
+		.txp(txp),
+		.txm(txm),
+		.rxp(rxp),
+		.rxm(rxm));
+`endif
 endmodule