X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/bf3f2c5f96cdfc7629e93d810f42550349388122..3db3fc270d517ca76518b47950f5240990e84cc5:/System.v?ds=sidebyside

diff --git a/System.v b/System.v
index 8f9ef08..55dda1c 100644
--- a/System.v
+++ b/System.v
@@ -107,9 +107,9 @@ module CellularRAM(
 	assign cr_nWE = decode ? ~wrlatch : 1;
 	
 	assign cr_DQ = (~cr_nOE) ? 16'bzzzzzzzzzzzzzzzz : {8'b0, datalatch};
-	assign cr_A = (addrlatch[15:14] == 2'b00) ? /* extrom */ {9'b0,addrlatch[13:0]} :
-			(addrlatch[15:13] == 3'b101) ? {1'b1, 9'b0, addrlatch[12:0]} :
-			(addrlatch == ADDR_PROGDATA) ? progaddr :
+	assign cr_A = (address[15:14] == 2'b00) ? /* extrom */ {9'b0,address[13:0]} :
+			(address[15:13] == 3'b101) ? {1'b1, 9'b0, address[12:0]} :
+			(address == ADDR_PROGDATA) ? progaddr :
 			23'b0;
 	
 	reg [7:0] regbuf;
@@ -120,8 +120,8 @@ module CellularRAM(
 		ADDR_PROGADDRM: if (wr) progaddrm <= data;
 		ADDR_PROGADDRL: if (wr) progaddrl <= data;
 		ADDR_PROGDATA:	if (rd || wr) begin
-					progaddr <= {progaddrh[6:0], progaddrm[7:0], progaddr[7:0]};
-					{progaddrh[6:0], progaddrm[7:0], progaddr[7:0]} <= {progaddrh[6:0], progaddrm[7:0], progaddr[7:0]} + 23'b1;
+					progaddr <= {progaddrh[6:0], progaddrm[7:0], progaddrl[7:0]};
+					{progaddrh[6:0], progaddrm[7:0], progaddrl[7:0]} <= {progaddrh[6:0], progaddrm[7:0], progaddrl[7:0]} + 23'b1;
 				end
 		endcase
 		rdlatch <= rd;