X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/a8f4468d0cd6910eba8031e21038d76857a2c107..refs/heads/master:/LCDC.v?ds=inline diff --git a/LCDC.v b/LCDC.v index add6893..c550288 100644 --- a/LCDC.v +++ b/LCDC.v @@ -135,8 +135,8 @@ module LCDC( * Tile data from 8000-8FFF or 8800-97FF * Background tile maps 9800-9BFF or 9C00-9FFF */ - reg [7:0] tiledatahigh [3071:0]; - reg [7:0] tiledatalow [3071:0]; + reg [7:0] tiledatahigh [6143:0]; + reg [7:0] tiledatalow [6143:0]; reg [7:0] bgmap1 [1023:0]; reg [7:0] bgmap2 [1023:0]; @@ -146,14 +146,19 @@ module LCDC( // The new tile data is latched and ready when vxpos[2:0] is 3'b000! wire [7:0] vxpos_ = vxpos + 1; wire [9:0] bgmapaddr = {vypos[7:3], vxpos_[7:3]}; - reg [7:0] tileno; - wire [10:0] tileaddr = {tileno, vypos[2:0]}; + reg [7:0] tileno1; + reg [7:0] tileno2; + wire [7:0] tileno = rLCDC[3] ? tileno2 : tileno1; + wire [11:0] tileaddr = + {(rLCDC[4] ? {1'b0,tileno} : (9'b100000000 + {tileno[7],tileno})), + vypos[2:0]}; reg [7:0] tilehigh, tilelow; wire [1:0] prepal = {tilehigh[7-vxpos[2:0]], tilelow[7-vxpos[2:0]]}; - assign pixdata = {rBGP[{prepal,1'b1}],rBGP[{prepal,1'b0}]}; + assign pixdata = 2'b11-{rBGP[{prepal,1'b1}],rBGP[{prepal,1'b0}]}; wire decode_tiledata = (addr >= 16'h8000) && (addr <= 16'h97FF); wire decode_bgmap1 = (addr >= 16'h9800) && (addr <= 16'h9BFF); + wire decode_bgmap2 = (addr >= 16'h9C00) && (addr <= 16'h9FFF); wire [9:0] bgmapaddr_in = vraminuse ? bgmapaddr : addr[9:0]; wire [11:0] tileaddr_in = vraminuse ? tileaddr : addr[12:1]; @@ -161,10 +166,15 @@ module LCDC( always @(posedge clk) begin if ((vraminuse && ((posx == 2) || (vxpos[2:0] == 3'b111))) || decode_bgmap1) begin - tileno <= bgmap1[bgmapaddr_in]; + tileno1 <= bgmap1[bgmapaddr_in]; if (wr && decode_bgmap1 && ~vraminuse) bgmap1[bgmapaddr_in] <= data; end + if ((vraminuse && ((posx == 2) || (vxpos[2:0] == 3'b111))) || decode_bgmap2) begin + tileno2 <= bgmap2[bgmapaddr_in]; + if (wr && decode_bgmap2 && ~vraminuse) + bgmap2[bgmapaddr_in] <= data; + end if ((vraminuse && ((posx == 3) || (vxpos[2:0] == 3'b000))) || decode_tiledata) begin tilehigh <= tiledatahigh[tileaddr_in]; tilelow <= tiledatalow[tileaddr_in];