X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/6bd4619bee74d76a525f7def9ac56ffcf114a3f4..7541ec1789a729ac97d5f32e4d9360a42c759668:/System.v diff --git a/System.v b/System.v index 0e464f5..cdcee09 100644 --- a/System.v +++ b/System.v @@ -36,6 +36,7 @@ module MiniRAM( /* XXX will need to go INSIDE the CPU for when we do DMA */ odata <= ram[address[6:0]]; end end +endmodule module InternalRAM( input [15:0] address, @@ -82,7 +83,16 @@ module Switches( end endmodule +`ifdef isim +module Dumpable(input [2:0] r, g, input [1:0] b, input hs, vs, vgaclk); +endmodule +`endif + module CoreTop( +`ifdef isim + output reg vgaclk = 0, + output reg clk = 0, +`else input xtal, input [7:0] switches, input [3:0] buttons, @@ -90,15 +100,31 @@ module CoreTop( output serio, output wire [3:0] digits, output wire [7:0] seven, +`endif output wire hs, vs, output wire [2:0] r, g, - output wire [1:0] b); + output wire [1:0] b, + output wire soundl, soundr); + +`ifdef isim + always #62 clk <= ~clk; + always #100 vgaclk <= ~vgaclk; + Dumpable dump(r,g,b,hs,vs,vgaclk); + + wire [7:0] leds; + wire serio; + wire [3:0] digits; + wire [7:0] seven; + wire [7:0] switches = 8'b0; + wire [3:0] buttons = 4'b0; +`else wire xtalb, clk, vgaclk; IBUFG iclkbuf(.O(xtalb), .I(xtal)); CPUDCM dcm (.CLKIN_IN(xtalb), .CLKFX_OUT(clk)); pixDCM pixdcm (.CLKIN_IN(xtalb), .CLKFX_OUT(vgaclk)); - +`endif + wire [15:0] addr; wire [7:0] data; wire wr, rd; @@ -222,12 +248,23 @@ module CoreTop( .vblank(vblankirq), .lcdc(lcdcirq), .tovf(tmrirq), - .serial(0), - .buttons(0), + .serial(1'b0), + .buttons(1'b0), .master(irq), .jaddr(jaddr)); + + Soundcore sound( + .core_clk(clk), + .rd(rd), + .wr(wr), + .addr(addr), + .data(data), + .snd_data_l(soundl), + .snd_data_r(soundr)); endmodule +`ifdef verilator +`else module TestBench(); reg clk = 1; wire [15:0] addr; @@ -304,3 +341,4 @@ module TestBench(); .switches(switches), .ledout(leds)); endmodule +`endif