X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/537e1f833b8eba858c06053ea6006ea608b9a5cc..47a8eefe3693f2cfc96488d8b557f72612d685e0:/Makefile

diff --git a/Makefile b/Makefile
index 9d94442..40ea542 100644
--- a/Makefile
+++ b/Makefile
@@ -1,19 +1,24 @@
-VLOGS = 7seg.v GBZ80Core.v insn_call-callcc.v insn_incdec16.v \
-	insn_jr-jrcc.v insn_ld_reg_hl.v insn_ld_reg_reg.v insn_nop.v \
-	insn_ret-retcc.v Interrupt.v Uart.v allinsns.v insn_alu8.v \
-	insn_di-ei.v insn_jp_hl.v insn_ldh_ac.v insn_ld_reg_imm16.v \
-	insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v System.v CPUDCM.v \
-	insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
+VLOGS = 7seg.v Framebuffer.v GBZ80Core.v Interrupt.v LCDC.v Sound1.v \
+	Sound2.v Soundcore.v System.v Timer.v Uart.v
+
+VLOGS_ALL = $(VLOGS) insn_call-callcc.v insn_incdec16.v insn_jr-jrcc.v \
+	insn_ld_reg_hl.v insn_ld_reg_reg.v insn_nop.v insn_ret-retcc.v \
+	allinsns.v insn_alu8.v insn_di-ei.v insn_jp_hl.v insn_ldh_ac.v \
+	insn_ld_reg_imm16.v insn_ld_sp_hl.v insn_pop_reg.v insn_rst.v \
+	CPUDCM.v insn_alu_a.v insn_halt.v insn_jp-jpcc.v insn_ld_hl_reg.v \
 	insn_ld_reg_imm8.v insn_ldx_ahl.v insn_push_reg.v insn_vop_intr.v \
-	Timer.v LCDC.v insn_ldm_a.v
+	insn_ldm8_a.v insn_ldm16_a.v insn_ldbcde_a.v insn_alu_ext.v \
+	insn_bit.v insn_two_byte.v insn_incdec_reg8.v insn_add_hl.v
 
-all: CoreTop_rom.svf CoreTop_diag.svf CoreTop.twr
+all: CoreTop.svf
 
-CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS)
+sim: CoreTop_isim.exe
+
+CoreTop.ngc: CoreTop.xst CoreTop.prj $(VLOGS_ALL) fpgaboot.hex gbboot.hex
 	xst -ifn CoreTop.xst -ofn CoreTop.syr
 
 CoreTop.ngd: CoreTop.ngc foo.bmm CoreTop.ucf
-	ngdbuild -dd _ngo -uc CoreTop.ucf -nt timestamp -bm "foo.bmm" -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd
+	ngdbuild -dd _ngo -uc CoreTop.ucf -nt timestamp -p xc3s500e-fg320-5 "CoreTop.ngc" CoreTop.ngd
 
 CoreTop_map.ncd: CoreTop.ngd
 	map -p xc3s500e-fg320-5 -cm area -pr off -k 4 -c 100 -o CoreTop_map.ncd CoreTop.ngd CoreTop.pcf
@@ -37,12 +42,16 @@ netgen/par/.CoreTop_timesim.v_work: netgen/par/CoreTop_timesim.v
 CoreTop_isim_par.exe: netgen/par/.CoreTop_timesim.v_work
 	fuse -lib simprims_ver -lib unisims_ver -lib unimacro_ver -lib xilinxcorelib_ver -o CoreTop_isim_par.exe netgen/par/CoreTop_timesim.v -top CoreTop -top glbl
 
+CoreTop_isim.exe: $(VLOGS_ALL)
+	vlogcomp -d isim $(VLOGS) 
+	fuse -t CoreTop -o CoreTop_isim.exe
+
 parsim: CoreTop_isim_par.exe
 
 %.o: %.asm
 	rgbasm -o$@ $<
 
-%.bin: %.o rom.lnk
+%.bin: %.o
 	echo "[Objects]" > tmp.lnk
 	echo $< >> tmp.lnk
 	echo "" >> tmp.lnk
@@ -51,13 +60,14 @@ parsim: CoreTop_isim_par.exe
 	xlink tmp.lnk
 	rm tmp.lnk
 
-%.mem: %.bin
+%.mem: %.bin mashrom
 	./mashrom < $< > $@
 
-CoreTop_%.bit: %.mem CoreTop.bit foo_bd.bmm
-	data2mem -bm foo_bd.bmm -bd $< -bt CoreTop.bit -o b $@
+fpgaboot.hex: fpgaboot.bin mashrom
+	./mashrom 256 < $< > $@
+
 
-CoreTop_%.svf: CoreTop_%.bit impact.cmd
+CoreTop.svf: CoreTop.bit impact.cmd
 	sed -e s/XXX/$(subst .bit,,$<)/ < impact.cmd > tmp.cmd
 	impact -batch tmp.cmd