X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/4d90f272baf43caf90927ca7e893518d526649e5..7c1b9e8ea3a9ec0d0c00009df9212a1829e072ec:/diag.asm?ds=sidebyside diff --git a/diag.asm b/diag.asm index bc164a0..d269b25 100644 --- a/diag.asm +++ b/diag.asm @@ -33,6 +33,9 @@ main: ld hl, signon call puts + ld a, $91 + ld [$FF40], a + call putscreen ei @@ -50,64 +53,88 @@ main: signon: db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0 +tiles: + db %01111100 + db %11000110 + db %11000110 + db %11111110 + db %11000110 + db %11000110 + db %11000110 + db %00000000 + + db %11111100 + db %11000110 + db %11000110 + db %11111100 + db %11000110 + db %11000110 + db %11111100 + db %00000000 + + db %01111100 + db %11000110 + db %11000010 + db %11000000 + db %11000010 + db %11000110 + db %01111100 + db %00000000 + + db %11111100 + db %11000110 + db %11000110 + db %11000110 + db %11000110 + db %11000110 + db %11111100 + db %00000000 + putscreen: + LD A,$fc ; $001d Setup BG palette + LD [$FF47],A ; $001f + ; Wait for vblank -;.stat: ld a, [$FF41] ; STAT -; and $03 ; mode -; cp $01 ; VBLANK -;' jp nz, .stat + call .vblwait ld hl, $8000 ; Copy two tiles. - ld a, $AA - ld [hli], a - ld [hli], a - ld a, $55 - ld [hli], a - ld [hli], a - ld a, $AA - ld [hli], a - ld [hli], a - ld a, $55 - ld [hli], a - ld [hli], a - ld a, $AA - ld [hli], a - ld [hli], a - ld a, $55 - ld [hli], a - ld [hli], a - ld a, $AA - ld [hli], a - ld [hli], a - ld a, $55 + ld de, tiles + ld c, $20 +.cloop: ld a, [de] + inc de ld [hli], a ld [hli], a + dec c xor a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a - ld [hli], a + cp c + jr nz, .cloop ld hl, $9800 -.loop: ld a, $01 - ld [hli], a - xor a +.vloop: call .vblwait + ld c, $40 + ld b, 0 +.loop: ld a, b + inc b + and $03 ld [hli], a ld a, h cp $9C - jp nz,.loop + ret z + dec c + xor a + cp c + jr nz,.loop + jr .vloop + +.vblwait: +.stat1: ld a, [$FF41] ; STAT + and $03 + cp $00 + jp nz, .stat1 +.stat2: ld a, [$FF41] + and $03 + cp $01 + jr nz, .stat2 ret vbl: @@ -119,16 +146,23 @@ vbl: xor a ld [$FF0F], a - ld c, $42 ; SCY - ld a, [c] - inc a - ld [c], a + ld a, [$FF51] + bit 7, a + jr z, .nothing + + bit 0, a + call nz, .scyup - ld c, $43 ; SCX - ld a, [c] - inc a - ld [c], a + bit 1, a + call nz, .scydown + + bit 2, a + call nz, .scxup + + bit 3, a + call nz, .scxdown +.nothing: POP HL POP DE POP BC @@ -136,6 +170,23 @@ vbl: RETI +.scyup: ld hl, $FF42 + inc [hl] + ret + +.scydown: ld hl, $FF42 + dec [hl] + ret + +.scxup: ld hl, $FF43 + inc [hl] + ret + +.scxdown: ld hl, $FF43 + dec [hl] + ret + + lcdc: PUSH AF PUSH BC @@ -270,8 +321,8 @@ waitsw: ld a,[c] cp $0 jr z,.loop1 -.loop2: - ld a,[c] + +.loop2: ld a,[c] cp $0 jr nz,.loop2 ret