X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/47a8eefe3693f2cfc96488d8b557f72612d685e0..a6b499da5fd2a834963cc05178e6b8044dc9129f:/Buttons.v?ds=inline

diff --git a/Buttons.v b/Buttons.v
index 6caecd6..4d8a171 100644
--- a/Buttons.v
+++ b/Buttons.v
@@ -8,23 +8,28 @@ module Buttons(
 	input rd,
 	input [15:0] addr,
 	inout [7:0] data,
-	input [7:0] buttons
+	input [7:0] buttons,
 	output reg int
 	);
 
+	reg rdlatch;
+	reg [15:0] addrlatch;
+
 	reg [7:0] p1;
 	reg [3:0] oldp1013;
 
-	assign data = (rd && (addr == `ADDR_P1)) ? p1 : 8'bzzzzzzzz;
+	assign data = (rdlatch && (addrlatch == `ADDR_P1)) ? p1 : 8'bzzzzzzzz;
 
 	wire p1013 = (p1[4] ? 4'b1111 : ~buttons[3:0]) | (p1[5] ? 4'b1111 : ~buttons[7:4]);
 
-	always @ (negedge core_clk) begin
+	always @ (posedge core_clk) begin
 		if(wr) begin
 			case(addr)
 			`ADDR_P1: p1[5:4] <= data[5:4];
 			endcase
 		end
+		rdlatch <= rd;
+		addrlatch <= addr;
 		p1[3:0] <= p1013;
 		oldp1013 <= p1013;
 		int <= | (oldp1013 & (oldp1013 ^ p1013));