X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/1e26cecc7eb53d2765d7a4d7f21ceca81e165409..6bd4619bee74d76a525f7def9ac56ffcf114a3f4:/Uart.v?ds=sidebyside

diff --git a/Uart.v b/Uart.v
index f87005d..af173ca 100644
--- a/Uart.v
+++ b/Uart.v
@@ -1,5 +1,5 @@
 `define IN_CLK 8388608
-`define OUT_CLK 9600
+`define OUT_CLK 57600
 `define CLK_DIV `IN_CLK / `OUT_CLK
 `define MMAP_ADDR 16'hFF50
 
@@ -19,7 +19,6 @@ module UART(
 	reg [7:0] data_stor = 0;
 	reg [15:0] clkdiv = 0;
 	reg have_data = 0;
-	reg data_end = 0;
 	reg [3:0] diqing = 4'b0000;
 	
 	wire new = (wr) && (!have_data) && decode;