X-Git-Url: http://git.joshuawise.com/fpgaboy.git/blobdiff_plain/06ad3a30038ac8ca45dd7b0c34213c0c8335c17c..e7fb589a21ee26ad897e03cbd0d7a647d9cd97e5:/Timer.v?ds=sidebyside diff --git a/Timer.v b/Timer.v index 0481614..53f392d 100644 --- a/Timer.v +++ b/Timer.v @@ -9,11 +9,11 @@ module Timer( input rd, input [15:0] addr, inout [7:0] data, - output reg irq); + output reg irq = 0); reg [7:0] tima = 0, tma = 0, tac = 0, div = 0; reg ovf = 0; - reg [9:0] clkdv; + reg [9:0] clkdv = 0; wire is_tima = addr == `ADDR_TIMA; wire is_tma = addr == `ADDR_TMA;