Add DI/EI delay test. Add LD M, A.

[fpgaboy.git] / GBZ80Core.v

diff --git a/GBZ80Core.v b/GBZ80Core.v
index 33e7be6a12e18a4cafe5fdf9013fc4bd2f1e2b35..3bbaee8e24a92f85ebdba26d750a17bc62db6077 100644 (file)
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -71,6 +71,7 @@
 `define INSN_EI                        8'b11111011
 `define INSN_INCDEC_HL         8'b0011010x
 `define INSN_INCDEC_reg8       8'b00xxx10x
+`define INSN_LDM_A             8'b111xx000     // 1111 for ld A, x; 1110 for ld x, A; bit 1 specifies 16m8 or 8m8
 
 `define INSN_cc_NZ             2'b00
 `define INSN_cc_Z              2'b01