ld c, $51 ; Note that we are alive.
ld a, $FF
ld [c],a
+
+ ld sp, $DFF0
+
+ ld hl, $DF81
+ ld a, $80
+ ld [hl], a
- ld sp, $DFFF
+; ld c, $07
+; ld a, $04 ;start timer, 4.096KHz
+; ld [c], a
+diqs:; ei
+ jr diqs
ld hl, signon
call puts
+
+
+ ei
call memtest
call insntest
call waitsw
+ di
jr main
+ section "fuq",HOME[$50]
+irqhand:
+ PUSH AF
+ PUSH BC
+ PUSH DE
+ PUSH HL
+
+; ld c, $51
+; ld a, $F0
+; ld [c], a
+
+ xor a
+ ld c, $0F ; ack the irq
+ ld [c], a
+
+ ;ld a, $41 ; print A
+ ;call putc
+
+ ld hl, $DF81
+ ld a, [hl]
+; ld b, 1
+; add b
+ ld c, $51
+; ld [c], a
+; ld [hl], a
+
+
+; ld c, $51
+; ld a, $0F
+; ld [c], a
+
+ POP HL
+ POP DE
+ POP BC
+ POP AF
+ RETI
+
signon:
db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
ld hl,memteststr
call puts
- ld hl, $C000 ; Write loop
+ ld hl, $C001 ; Write loop
.wr:
ld a,h
xor l
cp l
jr nz, .wr
- ld hl, $C000 ; Read loop
+ ld hl, $C001 ; Read loop
.rd:
ld a,h
xor l
waitsw:
ld hl,waitswstr
call puts
-
+
ld c, $51
- ld a, $00
+ xor a
ld [c],a
- ld c, $51
ld b, $0
.loop1:
ld a,[c]
cp b
+ ei
jr z,.loop1
.loop2:
ld a,[c]
ret
waitswstr:
- db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
+ db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
; Core instruction basic acceptance tests.
insntest:
jr .fail
rst $00
.jr:
+
+ ; Test inc16
+ ld d, $12
+ ld e, $FF
+ ld hl, .inc16fail
+ inc de
+ ld a, $13
+ cp d
+ jr nz, .fail
+ ld a, $00
+ cp e
+ jr nz, .fail
; Test CP.
ld hl, .cpfail
db "CP",0
.cplfail:
db "CPL",0
+.inc16fail:
+ db "INC16",0
.testfailed:
db " test failed.",$0D,$0A,0
.ok:
; Serial port manipulation functions.
putc:
- push af
ld b, 0
ld c, $50
+ push af
.waitport:
ld a,[c]
cp b