Fix some really dumb no-synthesize issues LIKE NOT TYPING THE MODULE NAME CORRECTLY...

[fpgaboy.git] / GBZ80Core.v

diff --git a/GBZ80Core.v b/GBZ80Core.v
index 8970e5d7132861495e894b319f8f3510f85333e2..e1aa3087b0a94f4cb7e422c3160b7849bf334c5a 100644 (file)
--- a/GBZ80Core.v
+++ b/GBZ80Core.v
@@ -333,8 +333,6 @@ module GBZ80Core(
                        end
                        wr <= 0;
                        rd <= 0;
                        end
                        wr <= 0;
                        rd <= 0;

-                       buswr <= 0;
-                       busrd <= 0;

                        address <= 16'bxxxxxxxxxxxxxxxx;        // Make it obvious if something of type has happened.
                        wdata <= 8'bxxxxxxxx;
                        state <= `STATE_EXECUTE;
                        address <= 16'bxxxxxxxxxxxxxxxx;        // Make it obvious if something of type has happened.
                        wdata <= 8'bxxxxxxxx;
                        state <= `STATE_EXECUTE;