Make binwire a little bit more error-resistant

[fpgaboy.git] / insn_vop_intr.v

diff --git a/insn_vop_intr.v b/insn_vop_intr.v
index 134d462602950e763feeefe0d69d0473ca9ea176..5cb40e1f6f5b8e2d99df0a6cf53c02147fe9baf1 100644 (file)
--- a/insn_vop_intr.v
+++ b/insn_vop_intr.v
@@ -1,19 +1,9 @@
 `ifdef EXECUTE
        `INSN_VOP_INTR: begin
                case (cycle)
-               0:      begin
-                               address <= {registers[`REG_SPH],registers[`REG_SPL]} - 1;
-                               wdata <= registers[`REG_PCH];
-                               wr <= 1;
-                       end
-               1:      begin
-                               address <= {registers[`REG_SPH],registers[`REG_SPL]} - 2;
-                               wdata <= registers[`REG_PCL];
-                               wr <= 1;
-                       end
-               2:      begin
-                               `EXEC_NEWCYCLE;
-                       end
+               0:      `EXEC_WRITE(`_SP - 1, `_PCH)
+               1:      `EXEC_WRITE(`_SP - 2, `_PCL)
+               2:      `EXEC_NEWCYCLE
                endcase
        end
 `endif
@@ -25,10 +15,8 @@
                1:      begin end
                2:      begin
                                ie <= 0;
-                               {registers[`REG_PCH],registers[`REG_PCL]} <=
-                                       {8'b0,jaddr};
-                               {registers[`REG_SPH],registers[`REG_SPL]} <=
-                                       {registers[`REG_SPH],registers[`REG_SPL]} - 2;
+                               `_PC <= {8'b0, jaddr};
+                               `_SP <= `_SP - 2;
                        end
                endcase
        end