- 0: begin
- case (opcode[5:4])
- `INSN_reg16_BC: begin
- tmp <= registers[`REG_B];
- tmp2 <= registers[`REG_C];
- end
- `INSN_reg16_DE: begin
- tmp <= registers[`REG_D];
- tmp2 <= registers[`REG_E];
- end
- `INSN_reg16_HL: begin
- tmp <= registers[`REG_H];
- tmp2 <= registers[`REG_L];
- end
- `INSN_reg16_SP: begin
- tmp <= registers[`REG_SPH];
- tmp2 <= registers[`REG_SPL];
- end
- endcase
- end
+ 0: case (opcode[5:4])
+ `INSN_reg16_BC: {tmp,tmp2} <= `_BC;
+ `INSN_reg16_DE: {tmp,tmp2} <= `_DE;
+ `INSN_reg16_HL: {tmp,tmp2} <= `_HL;
+ `INSN_reg16_SP: {tmp,tmp2} <= `_SP;
+ endcase