ld hl,waitswstr
call puts
+ ld c, $07
+ ld a, $07 ;start timer, 4.096KHz
+ ld [c], a
+
ld c, $51
ld a, $00
ld [c],a
+.loop1:
+ push bc
+ call testa
+ pop bc
ld c, $51
ld b, $0
-.loop1:
ld a,[c]
cp b
jr z,.loop1
ret
waitswstr:
- db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
+ db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
+
+testa:
+ ld c, $0F
+ ld a, [c]
+ ld b, $00
+ cp b
+ ret z
+ xor a
+ ld [c], a
+ ld hl, $D000
+ ld c, [hl]
+ inc bc
+ ld [hl], c
+ ld a, c
+ ld c, $50
+ ld [c], a
+ ret
; Core instruction basic acceptance tests.
insntest:
; Serial port manipulation functions.
putc:
- push af
ld b, 0
ld c, $50
.waitport:
ld a,[c]
cp b
jr nz,.waitport
- pop af
ld [c],a
ret