]> Joshua Wise's Git repositories - fpgaboy.git/blobdiff - CoreTop.prj
Add files needed for build
[fpgaboy.git] / CoreTop.prj
diff --git a/CoreTop.prj b/CoreTop.prj
new file mode 100644 (file)
index 0000000..657572c
--- /dev/null
@@ -0,0 +1,10 @@
+verilog work "Uart.v"
+verilog work "Timer.v"
+verilog work "Interrupt.v"
+verilog work "GBZ80Core.v"
+verilog work "CPUDCM.v"
+verilog work "7seg.v"
+verilog work "System.v"
+verilog work "LCDC.v"
+verilog work "Framebuffer.v"
+verilog work "pixDCM.v"
\ No newline at end of file
This page took 0.023766 seconds and 4 git commands to generate.