input serial,
input buttons,
output master,
+ input ack,
output [7:0] jaddr);
wire [7:0] iflag = {3'b0,buttons,serial,tovf,lcdc,vblank};
`ADDR_IE : begin imask <= data; ihold <= ihold | iflag; end
endcase
- end
+ end else if (ack)
+ ihold <= ihold &
+ (imasked[0] ? 8'b11111110 :
+ imasked[1] ? 8'b11111101 :
+ imasked[2] ? 8'b11111011 :
+ imasked[3] ? 8'b11110111 :
+ imasked[4] ? 8'b11101111 :
+ 8'b11111111);
else
ihold <= ihold | iflag;
rdlatch <= rd;