`define IN_CLK 8388608
-`define OUT_CLK 9600
+`define OUT_CLK 57600
`define CLK_DIV `IN_CLK / `OUT_CLK
`define MMAP_ADDR 16'hFF50
input rd,
input [15:0] addr,
inout [7:0] data,
- output reg serial);
+ output reg serial = 1);
wire decode = (addr == `MMAP_ADDR);
reg [7:0] data_stor = 0;
reg [15:0] clkdiv = 0;
reg have_data = 0;
- reg data_end = 0;
reg [3:0] diqing = 4'b0000;
wire new = (wr) && (!have_data) && decode;