ld c, $51 ; Note that we are alive.
ld a, $FF
ld [c],a
-
+
ld sp, $DFFF
ld hl, signon
call puts
+
+ ld c, $07
+ ld a, $04 ;start timer, 4.096KHz
+ ld [c], a
+ ei
call memtest
call insntest
call waitsw
+ di
jr main
+ section "fuq",HOME[$100]
+irqhand:
+ PUSH AF
+ PUSH BC
+ PUSH DE
+ PUSH HL
+ xor a
+ ld c, $0F ; ack the irq
+ ld [c], a
+ ld a, $41 ; print A
+ call putc
+ POP HL
+ POP DE
+ POP BC
+ POP AF
+ RETI
+
signon:
db $0D,$0A,$1B,"[1mFPGABoy Diagnostic ROM",$1B,"[0m",$0D,$0A,0
waitsw:
ld hl,waitswstr
call puts
-
+
ld c, $51
- ld a, $00
+ xor a
ld [c],a
- ld c, $51
ld b, $0
.loop1:
ld a,[c]
ret
waitswstr:
- db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset.",$0D,$0A,0
+ db "Diagnostic ROM complete; flip switches to nonzero and then to zero to reset. Expect A.",$0D,$0A,0
; Core instruction basic acceptance tests.
insntest:
jr .fail
rst $00
.jr:
+
+ ; Test inc16
+ ld d, $12
+ ld e, $FF
+ ld hl, .inc16fail
+ inc de
+ ld a, $13
+ cp d
+ jr nz, .fail
+ ld a, $00
+ cp e
+ jr nz, .fail
; Test CP.
ld hl, .cpfail
call puts
ret
.fail:
+ call puts
+ ld hl, .testfailed
call puts
ret
.insnteststr:
- db "Testing instructions... ",$0
+ db "Testing instructions... ",0
.pushpopfail:
- db "PUSH/POP test failed.",$0D,$0A,0
+ db "PUSH/POP",0
.ff:
db $FF
.xorhlfail:
- db "XOR [HL] test failed.",$0D,$0A,0
+ db "XOR [HL]",0
.jphlfail:
- db "JP [HL] test failed.",$0D,$0A,0
+ db "JP [HL]",0
.jrfail:
- db "JR test failed.",$0D,$0A,0
+ db "JR",0
.cpfail:
- db "CP test failed.",$0D,$0A,0
+ db "CP",0
.cplfail:
- db "CPL test failed.",$0D,$0A,0
+ db "CPL",0
+.inc16fail:
+ db "INC16",0
+.testfailed:
+ db " test failed.",$0D,$0A,0
.ok:
db "OK!",$0D,$0A,0
; Serial port manipulation functions.
putc:
- push af
ld b, 0
ld c, $50
+ push af
.waitport:
ld a,[c]
cp b
jr puts
.done:
ret
-